Hydrogenated amorphous silicon thin-film transistor arrays fabricated by digital lithography

A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 /spl times/ 64 pixel (300 /spl mu/m pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5 V, carrier mobility of 0.7 cm/sup 2//V/spl middot/s, subthreshold slope of 0.76 V/decade, and an on/off ratio of 10/sup 8/.     

On teletraffic applications to OBS

We provide teletraffic models for loss probability evaluation of optical burst switching (OBS). We show that the popular Engset formula is not exact for OBS modeling and demonstrate that in certain cases it is not appropriate. A new exact model is provided. The various models are compared using numerical results for various OBS alternatives with and without burst segmentation.     

Pile Response Adjacent to Braced Excavation

The excavation of soil for the construction of basements or cut-and-cover tunnels results in ground movements. One particular concern is that the excavation-induced lateral soil movements may adversely affect any nearby pile foundation. The lateral loads imposed by the soil movements induce bending moments and deflections in the pile, which may lead to structural distress and failure. This paper presents the results of an actual full-scale instrumented study that was carried to examine the behavior of an existing pile due to nearby excavation activities resulting from the construction of a 16 m deep cut-and-cover tunnel. The pile was located 3 m behind a 0.8 m thick diaphragm wall. Excavation to the formation level that was 16 m below the ground surface resulted in a maximum lateral pile movement of 28 mm. A simplified numerical procedure based on the finite-element method was used to analyze the pile response. Generally, the theoretical predictions were in reasonable agreement with the measured results.     

Ionophore-mediated uptake of ciprofloxacin and vincristine into large unilamellar vesicles exhibiting transmembrane ion gradients

A new method, based on the ion-translocating properties of the ionophores nigericin and A23187, is described for loading large unilamellar vesicles (LUVs) with the drugs vincristine and ciprofloxacin. LUVs composed of distearoylphosphatidylcholine/cholesterol (DSPC/Chol) (55:45 mol/mol) or sphingomyelin (SPM)/Chol (55:45 mol/mol) exhibiting a transmembrane salt gradient (for example, internal solution 300 mM MnSO4 or K2SO4; external solution 300 mM sucrose) are incubated in the presence of drug and, for experiments involving divalent cations, the chelator EDTA. The addition of ionophore couples the outward movement of the entrapped cation to the inward movement of protons, thus acidifying the vesicle interior. External drugs that are weak bases can be taken up in response to this induced transmembrane pH gradient. It is shown that both nigericin and A23187 facilitate the rapid uptake of vincristine and ciprofloxacin, with entrapment levels approaching 100% and excellent retention in vitro. Following drug loading, the ionophores can be removed by gel exclusion chromatography, dialysis, or treatment with biobeads. In vitro leakage assays (addition of 50% mouse serum) and in vivo pharmacokinetic studies (in mice) reveal that the A23187/Mn2+ system exhibits superior drug retention over the nigericin/K+ system, and compares favorably with vesicles loaded by the standard DeltapH or amine methods. The unique features of this methodology and possible benefits are discussed.     

A selective CVD tungsten-strapped polysilicon local interconnectiontechnology

A local interconnection technology utilizing polysilicon strapped with selective-chemical-vapor-deposited (CVD) tungsten has been developed. Both n- and p-channel MOS transistors have been successfully fabricated using this technology. Tungsten deposited on polysilicon is an attractive gate shunt and local interconnection material because of its low resistivity, immunity to dopant segregation and diffusion, and resistance to electromigration. A potential problem of this technology is the excessive diode leakage current associated with strapping shallow source/drain diodes with tungsten. The leakage is attributed to defects induced by the heavy source/drain implant, which can be effectively eliminated with a proper annealing procedure     

New queueing strategies employing service interval-based priority for real-time communications in atm networks

In this paper, we propose queueing strategies employing the service interval-based priority (sip) which can provide delay-bounded, and loss-free services, while maximizing bandwidth utilization in the atm network. We also describe a variation of the sip, the residual service interval-based priority (rsip) which can achieve almost full utilization by assigning priorities dynamically on the basis of the residual service interval. We store the realtime cells belonging to different connections in logically separated queues, and for each queue, we set a parameter called service interval, during which only one cell is allowed to be transmitted. The sip server takes and transmits the head-of-line (hol) cell of the queue which has the smallest service interval, while the rsip server selects the queue with the smallest residual service interval. When there is no eligible real-time cell, it transmits non-real-time cell, thus enabling a maximized bandwidth utilization. Employing the above queueing strategies, we analyze the delay characteristics deterministically with the leaky bucket bounded input traffic and then dimension the optimal service interval. In dimensioning the service interval and buffer space of each real-time service queue, we consider burstiness of traffic in conjunction with delay constraints, so that bandwidth utilization can get maximized. In addition, we consider the issues of protection from malicious users, average bandwidth utilization, and coupling between the delay bound and the bandwidth allocation granularity.     

分子结构对增塑聚氯乙烯性能的影响

研究了聚合度、分子量分布和支化结构对增塑聚氯乙烯加工流变性能和物理力学性能的影响。结果表明，增塑ＰＶＣ的加工流变性能随聚合度的增加而恶化；拓宽分子量分布和引入支化结构均有利于加工流变性能的提高；增塑ＰＶＣ的拉伸强度随聚合度的增加而提高，而压缩永久变形却随之减小；分子量分布对物理力学性能的影响不大；支化ＰＶＣ的拉伸强度略有下降。     

Prevention of bleeding after cardiopulmonary bypass with high-dose tranexamic acid. Double-blind, randomized clinical trial

This prospective, double-blind, randomized trial assessed the effectiveness of high-dose tranexamic acid given in the preoperative period on blood loss in patients undergoing cardiopulmonary bypass. One hundred fifty patients scheduled to undergo cardiac operations with cardiopulmonary bypass were randomized into three groups of equal size. The first group received 10 gm of tranexamic acid intravenously over 20 minutes before sternotomy and a placebo infusion over 5 hours. The second group received 10 gm of tranexamic acid over 20 minutes and then another 10 gm infused intravenously over 5 hours. The control group received a placebo bolus and a placebo infusion over 5 hours (0.9% normal saline solution). The blood loss after the operation was measured at 6 hours and 24 hours. The homologous blood and blood products given during and up to 48 hours after operation were recorded. Eighteen percent of the control group patients shed more than 750 ml blood in 6 hours compared with only 2% in both tranexamic acid groups. Patients who shed more than 750 ml blood required 93% more red blood cell transfusions than patients without excessive bleeding. Tranexamic acid (10 gm) given intravenously in the period before cardiopulmonary bypass reduced blood loss over 6 hours by 50% and over 24 hours by 35%. Continued tranexamic acid infusion (10 gm over 5 hours) did not reduce bleeding further. There was no difference in the coagulation profile before operation between patients with and without excessive bleeding. However, coagulation tests done in the postoperative period indicated ongoing fibrinolysis and platelet dysfunction in patients with excessive bleeding.     

A 286 mm2 256 Mb DRAM with ×32 both-ends DQ

This paper describes a 256 Mb DRAM chip architecture which provides up to ×32 wide organization. In order to minimize the die size, three new techniques: an exchangeable hierarchical data line structure, an irregular sense amp layout, and a split address bus with local redrive scheme in the both-ends DQ were introduced. A chip has been developed based on the architecture with 0.25 μm CMOS technology. The chip measures 13.25 mm×21.55 mm, which is the smallest 256 Mb DRAM ever reported. A row address strobe (RAS) access time of 26 ns was obtained under 2.8 V power supply and 85°C. In addition, a 100 MHz×32 page mode operation, namely 400 M byte/s data rate, in the standard extended data output (EDO) cycle has been successfully demonstrated