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151.
152.
This paper proposes a novel class of Command Governor (CG) strategies for input and state-related constrained discrete-time LTI systems subject to bounded disturbances in the absence of explicit state or output measurements. While in traditional CG schemes the set-point manipulation is undertaken on the basis of either the actual measure of the state or its suitable estimation, it is shown here that the CG design problem can be solved, with limited performance degradation and with similar properties, also in the case that such an explicit measure is not available. This approach, which will be referred to as the Feed-Forward CG (FF-CG) approach, may be a convenient alternative CG solution in all situations whereby the cost of measuring the state may be a severe limitation, e.g. in distributed or decentralized applications. In order to evaluate the method proposed here, numerical simulations on a physical example have been undertaken and comparisons with the standard state-based CG solution reported.  相似文献   
153.
In this paper, the problem of residual variance estimation is examined. The problem is analyzed in a general setting which covers non-additive heteroscedastic noise under non-iid sampling. To address the estimation problem, we suggest a method based on nearest neighbor graphs and we discuss its convergence properties under the assumption of a Hölder continuous regression function. The universality of the estimator makes it an ideal tool in problems with only little prior knowledge available.  相似文献   
154.
We present a novel logic-based framework to automate multi-issue bilateral negotiation in e-commerce settings. The approach exploits logic as communication language among agents, and optimization techniques in order to find Pareto-efficient agreements. We introduce , a propositional logic extended with concrete domains, which allows one to model relations among issues (both numerical and non-numerical ones) via logical entailment, differently from well-known approaches that describe issues as uncorrelated. Through it is possible to represent buyer’s request, seller’s supply and their respective preferences as formulas endowed with a formal semantics, e.g., “if I spend more than 30000 € for a sedan then I want more than a two-years warranty and a GPS system included”. We mix logic and utility theory in order to express preferences in a qualitative and quantitative way. We illustrate the theoretical framework, the logical language, the one-shot negotiation protocol we adopt, and show we are able to compute Pareto-efficient outcomes, using a mediator to solve an optimization problem. We prove the computational adequacy of our method by studying the complexity of the problem of finding Pareto-efficient solutions in our setting.  相似文献   
155.
The present paper is a sequel to Paoli F, Ledda A, Giuntini R, Freytes H (On some properties of QMV algebras and QMV algebras, submitted). We provide two representation results for quasi-MV algebras in terms of MV algebras enriched with additional structure; we investigate the lattices of subvarieties and subquasivarieties of quasi-MV algebras; we show that quasi-MV algebras, as well as cartesian and flat quasi-MV algebras, have the amalgamation property.  相似文献   
156.
To provide formal foundations to current (web) services technologies, we put forward using COWS, a process calculus for specifying, combining and analysing services, as a uniform formalism for modelling all the relevant phases of the life cycle of service-oriented applications, such as publication, discovery, negotiation, deployment and execution. In this paper, we show that constraints and operations on them can be smoothly incorporated in COWS, and propose a disciplined way to model multisets of constraints and to manipulate them through appropriate interaction protocols. Therefore, we demonstrate that also QoS requirement specifications and SLA achievements, and the phases of dynamic service discovery and negotiation can be comfortably modelled in COWS. We illustrate our approach through a scenario for a service-based web hosting provider.  相似文献   
157.
A low-power wireless video sensor node for distributed object detection   总被引:2,自引:0,他引:2  
In this paper we propose MicrelEye, a wireless video node for cooperative distributed video processing applications that involve image classification. The node is equipped with a low-cost VGA CMOS image sensor, a reconfigurable processing engine (FPGA, Microcontroller, SRAM) and a Bluetooth 100-m transceiver. It has a size of few cubic centimeters and its typical power consumption is approximately ten times less than that of typical commercial DSP-based solutions. As regards classification, a highly optimized hardware-oriented support vector machine-like (SVM-like) algorithm called ERSVM is proposed and implemented. We describe our hardware and software architecture, its performance and power characteristics. The case study considered in this paper is people detection. The obtained results suggest that the present technology allows for the design of simple intelligent video nodes capable of performing classification tasks locally.
Luca BeniniEmail:
  相似文献   
158.
This paper presents novel algorithmic and architectural solutions for real-time and power-efficient enhancement of images and video sequences. A programmable class of Retinex-like filters, based on the separation of the illumination and reflectance components, is proposed. The dynamic range of the input image is controlled by applying a suitable non-linear function to the illumination, while the details are enhanced by processing the reflectance. An innovative spatially recursive rational filter is used to estimate the illumination. Moreover, to improve the visual quality results of two-branch Retinex operators when applied to videos, a novel three-branch technique is proposed which exploits both spatial and temporal filtering. Real-time implementation is obtained by designing an Application Specific Instruction-set Processor (ASIP). Optimizations are addressed at algorithmic and architectural levels. The former involves arithmetic accuracy definition and linearization of non-linear operators; the latter includes customized instruction set, dedicated memory structure, adapted pipeline, bypasses, custom address generator, and special looping structures. The ASIP is synthesized in standard-cells CMOS technology and its performances are compared to known Digital signal processor (DSP) implementations of real-time Retinex filters. As a result of the comparison, the proposed algorithmic/architectural design outperforms state-of-art Retinex-like operators achieving the best trade-off between power consumption, flexibility, and visual quality.
Giovanni RamponiEmail:

Sergio Saponara   is a Research Scientist and Assistant Professor at the University of Pisa. He was born in Bari, Italy, in 1975. He received the Electronic Engineering degree cum laude and the Ph.D. in Information Engineering, both from Pisa University, in 1999 and 2003, respectively. Since 2001 he collaborates with Consorzio Pisa Ricerche, Italy and in 2002 he was with IMEC, Belgium as Marie Curie research fellow. His research and teaching interests include electronic circuits and systems for multimedia, telecom and automation. He co-authored more than 40 papers including journals, conferences and patents. Luca Fanucci   is Associate Professor of Microelectronics at the University of Pisa. He was born in Montecatini, Italy, in 1965. He received the Doctor Engineer degree and the Ph.D. in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with the European Space Agency's Research and Technology Center, Noordwijk, The Netherlands, and from 1996 to 2004 he was a Research Scientist of the Italian National Research Council in Pisa. His research interests include design technologies for integrated circuits and systems, with emphasis on system-level design, hardware/software co-design and low-power. He co-authored more than 100 journal/conference papers and holds more than 10 patents. Stefano Marsi   was born in Trieste, Italy, in 1963. He received the Doctor Engineer degree in Electronic Engineering (summa cum laude) in 1990 and the Ph.D. degree in 1994. Since 1995 he has held the position of researcher in the Department of Electronics at the University of Trieste where he is the teacher of courses in electronic field. His research interests include non-linear operators for image and video processing and their realization through application specific electronics circuits. He is author or co-author of more than 40 papers in international journals, proceedings of international conferences or contributions in books. Giovanni Ramponi   is Professor of Electronics at the Department of Electronics of the University of Trieste, Italy. His research interests include nonlinear digital signal processing, and the enhancement and feature extraction in images and image sequences. Prof. Ramponi has been an Associate Editor of the IEEE Signal Processing Letters and of the IEEE Transactions on Image Processing; presently is an AE of the SPIE Journal of Electronic Imaging. He has participated in various EU and National Research Projects. He is the co-inventor of various pending international patents and has published more than 140 papers in international journals and conference proceedings, and as book chapters. Prof. Ramponi contributes to several undergraduate and graduate courses on digital signal processing.   相似文献   
159.
160.
The authors, after some remarks on the pathophysiology of primary alkaline gastritis, analyze the main methods, available at present, for diagnosis; they particularly consider the importance of endoscopy and histology, gastroesophageal 24-hours pH-metry and 99mTc HIDA scintigraphy. Successively, they present the criteria for the identification of patients who will predictably benefit from surgical treatment, and examine advantages and limits of the two main corrective surgical techniques for the duodenogastric reflux in patients not previously operated on the gastrointestinal tract: duodenal extramucosal myotomy according to Mattioli, relatively easy to perform, and the "duodenal switch" according to De Meester, technically more complex, but pathophysiologically more acceptable, completely eliminating the duodenogastric reflux.  相似文献   
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