Design von pulverförmigen und granularen Waschmitteln

In the last fifty years, powder and granular detergents have been significantly improved in performance and ecology: more concentrated (less chemicals), biodegradable surfactants, no phosphates, reduced water and energy consumption. The use of optimized enzymes and bleaching boosters enables lowered wash temperatures and the removal of natural stains. The production of solid detergents runs either in spray towers without and with compaction step, or in a non‐tower agglomeration plant. The latest generation of granulation with an integrated mill for simultaneous drying and grinding allows the production of spherical particles, which can be adjusted (small or large, heavy or light). Future formulations will enable lower washing temperatures.     

Dynamic behavior of nanometer-scale amorphous intergranular film in silicon nitride by in situ high-resolution transmission electron microscopy

We report about the dynamic behavior of a nanometer-scale amorphous intergranular film (IGF) in a Si₃N₄ ceramic by an in situ heating experiment in a high-resolution transmission electron microscopy (HRTEM). During the experiment the IGF gradually vanishes at 820 °C accompanied by the formation of crystal planes within the IGF. The IGF reappears after cooling back to room temperature. The results cannot be explained within the framework of a force balance model. We argue that the dynamic behavior of the IGF in our experiment originates from the open system observed.     

Oxidation of Silicon Carbide Fibers During Static Fatigue in Air at Intermediate Temperatures

The static fatigue of SiC-based fiber bundles and single fibers has been examined in previous papers, with emphasis placed on the analysis of the stress–rupture time data, and on the modelling of delayed failure from slow crack growth. The present paper investigates the oxidation of the fibers during static fatigue, at temperatures in the intermediate temperature range (500°–800°C). Two oxidation-induced phenomena have been evidenced: the formation of a thin silica film at the surface of fibers and the delayed failure of fiber bundles and single filaments. The stress–rupture time data are interpreted with respect to the chemical and structural characteristics of fibers, and to the oxide film growth rate. The structural analysis of the fibers was carried out using scanning electron microscopy and Auger electron spectroscopy. Delayed failure was found to result from slow crack propagation from surface defects, as a result of the consumption of the free carbon at grain boundaries and the local stresses induced by the SiC→SiO₂ transformation at the crack tip. The respective contributions of these phenomena to static fatigue are discussed.     

Sustainability evaluation of decentralized electricity generation

Decentralized power generation is gaining significance in liberalized electricity markets. An increasing decentralization of power supply is expected to make a particular contribution to climate protection. This article investigates the advantages and disadvantages of decentralized electricity generation according to the overall concept of sustainable development. On the basis of a hierarchically structured set of sustainability criteria, four future scenarios for Germany are assessed, all of which describe different concepts of electricity supply in the context of the corresponding social and economic developments. The scenarios are developed in an explorative way according to the scenario method and the sustainability criteria are established by a discursive method with societal actors. The evaluation is carried out by scientific experts. By applying an expanded analytic hierarchy process (AHP), a multicriteria evaluation is conducted that identifies dissent among the experts. The results demonstrate that decentralized electricity generation can contribute to climate protection. The extent to which it simultaneously guarantees security of supply is still a matter of controversy. However, experts agree that technical and economic boundary conditions are of major importance in this field. In the final section, the article discusses the method employed here as well as implications for future decentralized energy supply.     

The TTA's Approach to Resilience after Transient Upsets

The Time-Triggered Architecture, as architecture for safety-critical real-time applications, incorporates fault-tolerance mechanisms to ensure correct system operation despite failures. The primary fault hypothesis of the TTA claims to tolerate either the arbitrary failure of any one of its nodes or the passively arbitrary failure of any one of its communication channels. To cover these failure modes, active redundancy techniques are used, which basically means that nodes and channels are physically replicated. The primary fault hypothesis, is, however, not strong enough for certain applications that have to tolerate transient upsets of multiple, possibly all, components in the system. Such a transient upset of the system may break up the synchrony of the nodes and leave disjoined sets of nodes synchronized to each other while the overall synchronization is lost. Although the TTA provides a clique avoidance algorithm that is able to correct a wide class of such multiple transient failures, a stronger algorithm is needed for full coverage. In this paper we discuss a secondary fault hypothesis for the TTA that addresses the transient upset of multiple components and present a new clique resolving algorithm based on the TTA's integrated diagnosis and startup service. This paper is a revised version of Steiner et al. (2003). This work has been funded by the European Project DECOS (Project number: IST-511764). Michael Paulitsch is currently affiliated with Honeywell International.     

A VLSI design methodology for distributed arithmetic

Real-time signal processing requires fast computation of inner products. Distributed arithmetic is a method of inner product computation that uses table-lookup and addition in place of multiplication. Distributed arithmetic has previously been shown to produce novel and seemingly efficient architectures for a variety of signal processing computations; however the methods of design, analysis and comparison have been ad hoc. We propose a systematic method for synthesizing optimal VLSI architectures using distributed arithmetic.A partition of the inner product computation at the word and bit level produces a computation consisting of lookups and additions. We study two classes of algorithms to implement this computation, regular iterative algorithms and tree algorithms, each of which can be expressed in the form of a dependency graph. We use linear and nonlinear maps to assign computations to processors in space and time. Expressions are developed for the area, latency, period and arithmetic error for a particular partition and space/time map of the dependecy graph. We use these expressions to formulate a constrained optimization problem over a large class of architectures. We compare distributed arithmetic with more conventional methods for inner product computation and show how area, latency and period may be traded off while maintaining constant error.This work was supported by Ball Aerospace, Boulder, CO and by the Office of Naval Research, Electronics Branch, Arlington, VA under contract ONR 89-J-1070.