Computational Fluid Dynamics Study on a Top-Blown Smelting Process with Lance Failure in an Isa Furnace

JOM - The Isa/Ausmelt smelting technology with a top submerged lance (TSL) has been extensively used in copper smelting processes. However, the TSL is extremely vulnerable to damage and failure...     

炼油达标污水回用处理试验研究

采用曝气生物滤池、多介质过滤、超滤、反渗透工艺,对炼油达标外排污水进行回用处理中试试验。结果表明,曝气生物滤池对油、COD和浊度去除效果良好,超滤、反渗透膜化学清洗周期达到 2个月以上,脱盐率稳定在98％以上,产水品质达到回用要求。     

柯克亚油气田混合来源天然气的地球化学特征

柯克亚油气田是我国开发比较早的一个油气田,但由于受混源和其他因素的影响,对气源的认识众说纷纭。通过对天然气的地球化学特征的分析,并参照国内外关于甲烷、乙烷、丙烷碳同位素关系方面的资料,提出了如下看法:柯克亚天然气碳同位素相对较重,与塔里木盆地下古生界海相天然气的碳同位素组成区别较大;根据天然气40Ar/36Ar组成,柯克亚油气田的气源不是单一来源;柯克亚油气田绝大多数天然气的甲烷和乙烷碳同位素值关系符合Faber推断的 型有机质方程直线关系,说明有机质属于较好的有机质类型,或者是由原油裂解形成的天然气;除了K2井和K18井天然气成熟度较低以外,绝大多数天然气的成熟度大约在1.8%～2.2%之间,属于高过成熟气,但也混有一些成熟度在0.9%～1.2%的源岩形成的天然气;推测天然气主要来源于石炭系―二叠系源岩,而混有成熟度低的源岩形成的天然气则有可能来自侏罗系源岩。     

管道风险管理方法研究

按照管道风险管理的流程分别对管道风险评价、风险控制和决策支持、效能测试和响应进行了论述。针对目前国内管道行业的情况，提出了进行管道风险评价的有效方法及维护措施。着重介绍了国外管道风险可接受标准的情况，作为国内制定管道风险评价标准的参考。     

川东气藏直井完井方法的产能预测研究

在分析研究目前国内外油气井完井产能计算经验公式的基础上，针对四川气田东部浅层气藏常用的几种完井方式，建立了该地区完井产能预测的数学模型。通过实例计算，表明了其数学模型的准确可行性，并为出砂井和非出砂井的完井方式提供了选择依据：对于出砂井，砾石裸眼充填完井方式是最理想的完井方式；对于非出砂井，实际裸眼完井的产能最大。得出的结论对该地区直井完井方式的选择，完井参数优化设计以及产能预测具有一定的指导作用。     

智能动态网络资源分配系统

通过对解决GSM移动通信网络热点区域话务拥塞问题的研究，提出了利用可控功分器实现智能动态网络资源的分配，解决不同种类的话务拥塞问题，并着重讨论了该系统目前的成功运用及前景。     

直线电机抽油机与游梁式抽油机性能对比

攻克了直线电机大推力的关键技术,研制成功了具有国际领先水平的直线电机抽油机。这种抽油机最大特点是改变了过去各种抽油机将电能转变为旋转运动,再通过机械方式转变为直线往复运动的方式,通过变频和控制直接将电能转变为直线往复运动。与游梁式抽油机相比,直线电机抽油机不但提高了机械效率,而且能够实现抽汲参数的无级调整,进而能够根据抽油的需要调整悬点运动规律,具备智能化控制和远程监控的有利条件。     

小型机载数字视频记录系统的设计与实现

采用嵌入式控制模块SOM2386和专用视频处理芯片SZ1510,设计和实现了一种基于电子硬盘存储的嵌入式小型机载数字视频记录系统。给出了系统总体方案,阐述了视音频解码编码、接口、控制及存储单元的硬件设计,介绍了系统的软件设计,并给出了系统软件的整体工作流程。该系统体积小、重量轻、抗震性好、使用维护方便,已在某型飞机上得到应用。     

Exposed Die-Top Encapsulation Molding for an Improved High- Performance Flip Chip BGA Package

The recent advancement in high- performance semiconductor packages has been driven by the need for higher pin count and superior heat dissipation. A one-piece cavity lid flip chip ball grid array (BGA) package with high pin count and targeted reliability has emerged as a popular choice. The flip chip technology can accommodate an I/O count of more than five hundreds500, and the die junction temperature can be reduced to a minimum level by a metal heat spreader attachment. None the less, greater expectations on these high-performance packages arose such as better substrate real estate utilization for multiple chips, ease in handling for thinner core substrates, and improved board- level solder joint reliability. A new design of the flip chip BGA package has been looked into for meeting such requirements. By encapsulating the flip chip with molding compound leaving the die top exposed, a planar top surface can be formed. A, and a flat lid can then be mounted on the planar mold/die top surface. In this manner the direct interaction of the metal lid with the substrate can be removed. The new package is thus less rigid under thermal loading and solder joint reliability enhancement is expected. This paper discusses the process development of the new package and its advantages for improved solder joint fatigue life, and being a multichip package and thin core substrate options. Finite-element simulations have been employed for the study of its structural integrity, thermal, and electrical performances. Detailed package and board-level reliability test results will also be reported