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221.
Y. Lu 《Journal of Materials Science》2003,38(5):1081-1085
A Golden Section approach combined with relational grade analysis is proposed as an experimental design tool helpful in the development of new automotive friction materials. Golden Section was used to design the volume fraction of the components systematically. The changes in friction performance (friction coefficient and wear) measured using Friction Assessment and Screening Test (FAST) can be correlated with component variations by use of relational grade analysis. This approach was utilized to optimize a non-metallic friction material containing seven ingredients including two fibers (aramid and slag fiber), four fillers (Al2O3, BaSO4, graphite and nitrile rubber) and one binder (benzoxazine). The volume fraction of seven components was varied simultaneously in order to optimize the parameters of friction coefficient and wear with a minimum number of tests. Three phases were performed to find the optimal proportion of the components. The optimized friction performance was obtained after doing 19 formulation experiments. 相似文献
222.
Hsu S. Alvandpour A. Mathew S. Shih-Lien Lu Krishnamurthy R.K. Borkar S. 《Solid-State Circuits, IEEE Journal of》2003,38(5):755-761
This paper describes a 32-KB two-read, one-write ported L0 cache for 4.5-GHz operation in 1.2-V 130-nm dual-V/sub TH/ CMOS technology. The local bitline uses a leakage-tolerant self reverse-bias (SRB) scheme with nMOS source-follower pullup access transistors, while preserving robust full-swing operation. Gate-source underdrive of -220 mV on the bitline read-select transistors is established without external bias voltages or gate-oxide overstress. Device-level measurements in the 130-nm technology show 72/spl times/ bitline active leakage reduction, enabling low-V/sub TH/ usage, 40% bitline keeper downsizing, and 16 bitcells/bitline. 11% faster read delay and 2/spl times/ higher dc noise robustness are achieved compared with high-performance dual-V/sub TH/ bitline scheme. Sustained performance and robustness benefits of the SRB technique against conventional dynamic bitline with scaling to 100- and 70-nm technology is also presented. 相似文献
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A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 /spl times/ 64 pixel (300 /spl mu/m pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5 V, carrier mobility of 0.7 cm/sup 2//V/spl middot/s, subthreshold slope of 0.76 V/decade, and an on/off ratio of 10/sup 8/. 相似文献
227.
Wang Tian-kui Lu Fang Fan Xiao-bing Shi Xiao-jun China Ship Scientific Research Center Wuxi China 《水动力学研究与进展(B辑)》2003,15(4)
1 . INTRODUCTIONIntherecentdecades ,itisrealizedthatitisquitenecessarytocarryouttestsathighReynoldsnumberwithalowbackgroundnoiselevelinordertomeetmoreandmoreurgentneedsofmodernnavyandmaritimeindustry .Anewlargecavita tionchannelisdevelopedinCSSRCfortestingcompletehull/ propulsor/appendagesarrange ments[1] .Itrepresentsoneofthelatestintechno logicallyadvancedlargecavitationtestfacilities.Inthefollowingsections ,thefeaturesandthefirsttestresultsofthechannelwillbedescribed .2 . DICRIP… 相似文献
228.
4G mobile communications: toward open wireless architecture 总被引:2,自引:0,他引:2
229.
Chuxiang Li Jianhua Lu Jun Gu Ming L. Liou 《The Journal of VLSI Signal Processing》2003,33(3):277-285
In this paper, error-resilient schemes are proposed to support robust video transmission for digital terrestrial TV broadcasting (DTTB). In particular, a temporal error concealment incorporated with a low-complexity block-matching is developed, achieving an effective reception of predictive pictures in harsh terrestrial environment. Special algorithms are also designed for isolated I-pictures. Moreover, combined with an intra/inter case prediction, an adaptive error concealment scheme is further contrived to fit for different error conditions. Extensive simulations have been conducted under various DTTB channel conditions, even with a very high packet error rate, to verify the effectiveness of the proposed schemes. 相似文献
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