N-Type Field-Effect Transistors Using Multiple Mg-Doped ZnO Nanorods

Nanorod field-effect transistors (FETs) that use multiple Mg-doped ZnO nanorods and a SiO₂ gate insulator were fabricated and characterized. The use of multiple nanorods provides higher on-currents without significant degradation in threshold voltage shift and subthreshold slopes. It has been observed that the on-currents of the multiple ZnO nanorod FETs increase approximately linearly with the number of nanorods, with on-currents of ~1 muA per nanorod and little change in off-current (~4times10^-12). The subthreshold slopes and on-off ratios typically improve as the number of nanorods within the device channel is increased, reflecting good uniformity of properties from nanorod to nanorod. It is expected that Mg dopants contribute to high n-type semiconductor characteristics during ZnO nanorod growth. For comparison, nonintentionally doped ZnO nanorod FETs are fabricated, and show low conductivity to compare with Mg-doped ZnO nanorods. In addition, temperature-dependent current-voltage characteristics of single ZnO nanorod FETs indicate that the activation energy of the drain current is very low (0.05-0.16 eV) at gate voltages both above and below threshold     

Model for Nanoscopic Domain Formation in Dipalmitoyl-PC/Dilauroyl-PC/Cholesterol Mixture

We describe the lyotropic liquid crystalline phase transitions in the lipid mixture dipalmitoil-PC/dilauroy-PC/cholesterol by 3D spin-1 lattice model. The formation of nanoscale domains with the characteristic size about 300 nm was studied in experiments on confocal fluorescence microscopy (CFM) (G. V. Feigenson and J. T. Buboltz, Biophys. J. 80, 2775 (2001)). The structure parameters of the lamellar vesicle in dipalmitoil-PC-rich phase, corresponding to these regions, are verified by numerical Monte Carlo simulations on the lattice. We point its superconductivity analogy properties at the region of phase stability for composition-dependent nanoscopic region.     

Pulse-Width Dependence in Current-Driven Magnetization Reversal Using GaMnAs-Based Double-Barrier Magnetic Tunnel Junction

We have investigated the current pulse width dependence on current-driven magnetization reversal in double-barrier structures using GaMnAs-based magnetic tunneling junctions (MTJ) in order to clarify the origin of low threshold current density for current-driven magnetization reversal. Comparing with the case of single-barrier MTJ, the pulse-width dependence reveals that threshold current density is reduced by double-barrier MTJ. We confirmed that the threshold current density in the order of 10⁴ A/cm² is estimated considering the effect of current pulse width.     

Functions for relative maximization

We introduce functions for relative maximization in a general context: the beta and alpha applications. After a systematic study of different kinds of regularities, we investigate how to approximate certain values of these functions using periodic orbits. We also show that the differential of an alpha application determines the asymptotic behavior of the optimal trajectories.     

Vehicle Localization Using Sensors Data Fusion Via Integration of Covariance Intersection and Interval Analysis

Achieving an innovative integrated sensor fusion architecture with a robust vehicle navigation and localization using an extended Kalman filter, interval analysis and covariance intersection that can overcome the uncertainty in the system model and sensor noise statistics. There are various approaches to the problem, but here the focus is on an approach which can guaranteed performance of sensor-based navigation. The guaranteed performance is quantified by explicit bounds of position estimate of a ground vehicle. Ground vehicles generally carry dead reckoning sensors such as wheel encoders and inertial sensors, to measure acceleration and angle rate, while obstacle detection and mapmaking is done with time-of-flight ultrasonic sensors. Most of these sensors give overlapping or complementary information and sometimes are redundant as well, which offers scope for exploiting data fusion. The purpose here is to achieve data fusion for ground vehicles with low-cost sensors by forming an intelligent sensor system. This is accomplished by combining the sensors' measurements and processing these measurements with data fusion algorithms. The algorithms are complementary in the sense that they compensate for each other's limitations, so that the resulting performance of the sensor system is better than its individual components.     

A Full Fingerprint Verification System for a Single-Line Sweep Sensor

This paper presents a full fingerprint verification system. It is composed of a tactile fingerprint sensor, integrated read out and conversion circuits, and dedicated recognition algorithms. The sensor is a single-line sweep mode sensor, e.g., it is made of a single line of sensing elements, thus covering the minimum surface of silicon. Compared with cm² sized touch sensors, it offers a large cost reduction and possibility of easy integration into portable devices. The use of a single line to measure a fingerprint requires the user to sweep its finger along the sensor. This sensing scheme produces fingerprint images with several distortions that needs further image processing to allow efficient fingerprint recognition. This is why we developed and present here specific algorithms to take care of the sensor's specifications. This paper will present measurement results, as well as a performance evaluation of the entire verification system.     

A Low-Complexity Circuit for On-Sensor Concurrent A/D Conversion and Compression

A low-complexity circuit for on-sensor compression is presented. The proposed circuit achieves complexity savings by combining a single-slope analog-to-digital converter with a Golomb-Rice entropy encoder and by implementing a low-complexity adaptation rule. The adaptation rule monitors the output codewords and minimizes their length by incrementing or decrementing the value of the Golomb-Rice coding parameter k. Its hardware implementation is one order of magnitude lower than existing adaptive algorithms. The compression circuit has been fabricated using a 0.35 muM CMOS technology and occupies an area of 0.0918 . Test measurements confirm the validity of the design.