模为合数时多值模代数的模减与模除运算

本文提出并分析了模为合数时多值逻辑中模加与模乘运算的逆运算－模减与模除运算。它的引入使模减，模除运算的基数（模）的取值域从素数扩展到合数，从而完善了对模代数中的模减、模除运算的研究。     

CMOS Design of Ternary Arithmetic Devices Wu Xunwei Dept.of Electronic Engineering,Hangzhou University,Hangzhou 310028F.P rosser Dept.of Computer Science,Indiana University,U.S.A.

This paper presents CMOS circuit designs of a ternary adder and a ternary multiplier,formulated usingtransmission function theory.Binary carry signals appearing in these designs allow conventional look-aheadcarry techniques to be used.Compared with previous similar designs,the circuits proposed in this paperhave advantages such as low dissipation,low output impedance,and simplicity of construction.     

基于时序特征的CMOS施密特电路开关级设计

根据施密特电路对输入信号具有二种检测阈值的工作特点 ,提出了施密特电路与用作存贮元件的触发器之间具有相同的时序特征。利用时序电路的设计方法 ,系统地研究了传统的 CMOS施密特电路的各种设计 ,并发现了一些新的设计方案。 PSPICE模拟证明所设计的电路具有理想的施密特电路特性     

最佳ULG_2双极型实用电路的设计与研究

本文介绍了近年来提出的一种新型逻辑元件——通用逻辑门.并提出了关于最佳ULG_2的实用电路.从电路的静态分析入手,通过实验,与传统的TTL标准门进行比较,认为该ULG_2实用电路可以胜任作为大规模集成电路待定逻辑阵列中的标准细胞.     

同步和异步时序电路的统一设计和分析理论

本文讨论了时钟信号的普遍描述和含时钟信号的触发器次态方程，并在此基础上提出了同步和异步时序电路的统一设计和分析理论。该理论的有效性已由实例予以证明。     

双端置数技术与高值CMOS触发器设计

在分析以往高值触发器困难的基础上本文提出了双端予置的逻辑设计方案。应用传输函数理论对四值ＣＭＯＳ触发器进行了电路设计。结果表明，与存贮相同信息量的二个二值触发器相比，它有较简单的结构与较快的工作速度。     

A UNIFIED THEORY FOR DESIGNING ANDANALYZING BOTH SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS

The paper discusses general expressions of the clock signal and the next state equations containing the clock signal for flip-flops, and based on it, a unified theory for designing and analyzing both synchronous and asynchronous sequential circuits is proposed. The theory is proved effective by practical examples.     

Design theory of digital circuits at switch level

By analysing problems in the traditional design theory of digital circuits it is proposed that both switching variable and signal variable should be adopted for describing the switching state of internal elements and signal in digital circuits respectively.Based on the above viewpoint the switch-signal theory is established.According to the working principle in CMOS circuits,the related design technique at switch level is developed.By using the practical design examples it is shown that the circuits designed at switch level have simpler structures than their counterparts designed at the traditional gate level since the switch transistors are used as construction units in designs.     

三值闩锁和锁存器的结构研究

本文从存贮功能的数学表述出发,分别就模代数和格代数等两种情况系统地研究了三值闩锁的各种结构。此外,根据对闩锁输入待存贮信号的能力要求,本文归纳了用与门,或门和二选一数据选择器中断反馈环路的设计技术,并在此基础上设计了三值锁存器。