Performance of interface engineeredSiNx/ICL/InP/In0.53Ga0.47As/InP dopedchannel HIGFET's

SiN_x/InP/InGaAs doped channel passivated heterojunction insulated gate field effect transistors (HIGFETs) have been fabricated for the first time using an improved In-S interface control layer (ICL). The insulated gate HIGFETs exhibit very low gate leakage (10 nA@V_GS =±5 V) and I_DS (sat) of 250 mA/mm. The doped channel improves the DC characteristics and the HIGFETs show transconductance of 140-150 mS/mm (L_g=2 μm), f_t of 5-6 GHz (L_g=3 μm), and power gain of 14.2 dB at 3 GHz. The ICL HIGFET technology is promising for high frequency applications     

Threshold voltage-minimum gate length trade-off in buried channelPMOS devices for scaled supply voltage CMOS technologies

The trade-off between threshold voltage (V_th) and the minimum gate length (L_min) is discussed for optimizing the performance of buried channel PMOS transistors for low voltage/low power high-speed digital CMOS circuits. In a low supply voltage CMOS technology it is desirable to scale V_th and L_min for improved circuit performance. However, these two parameters cannot be scaled independently due to the channel punch-through effect. Statistical process/device modeling, split lot experiments, circuit simulations, and measurements are performed to optimize the PMOS transistor current drive and CMOS circuit speed. We show that trading PMOS transistor V_th for a smaller L_min results in faster circuits for low supply voltage (3.3 to 1.8 V) n⁺-polysilicon gate CMOS technology, Circuit simulation and measurements are performed in this study. Approximate empirical expressions are given for the optimum buried channel PMOS transistor V _th for minimizing CMOS circuit speed for cases involving: (1) constant capacitive load and (2) load capacitance proportional to MOS gate capacitance. The results of the numerical exercise are applied to the centering of device parameters of a 0.5 μm 3.3 V CMOS technology that (a) matches the speed of our 0.5 μm 5 V CMOS technology, and (b) achieves good performance down to 1.8 V power supply. For this process the optimum PMOS transistor V_th (absolute value) is approximately 0.85-0.90 V     

Restoration of masonry facades, renders and final coats in a severe climate

The restoration of relatively old masonry buildings, 1870-1920, represents about 119930 flats and offices in the 4-5 largest cities in Norway. Driving rain and a severe climate are the key factors for deterioration. The paper describes a case study at the city campus of the University of Oslo.     

Analysis and design-optimization of LCC resonant inverter forhigh-frequency AC distributed power system

The analysis and design of an LCC resonant inverter for a 20 kHz AC distributed power system are presented. Several resonant converter topologies are assessed to determine their suitability for high efficiency power conversion, under resistive and reactive loads. Two LCC-resonant inverter designs were implemented. One with all switches operating with zero voltage switching (ZVS), and another with two switches operating with ZVS and two switches with zero current switching (ZCS). The experimental results are presented along with a performance comparison of the two versions     

Transmission distance of in-line amplifier systems withgroup-velocity-dispersion compensation

Group-velocity dispersion (GVD) compensation in in-line amplifier systems is evaluated from the viewpoint of improving the transmission distance. The nonlinear Schrodinger equation, which simulates signal propagation in optical fibers, is numerically evaluated to clarify the optimum configuration for GVD compensation. It is shown that the optimum amount of GVD compensation is about 100% of the GVD experienced by the transmitted signal. The optimum compensation interval is found to be a function of the bit rate, signal power, and dispersion parameter. For dispersion parameter values ranging from about -0.1 ps/nm/km to -10 ps/nm/km, and an amplifier noise figure of about 6 dB, the optimum compensation configuration can eliminate the GVD from in-line amplifier systems, thus improving transmission distances to those limited by self-phase modulation and higher-order GVD