A model for evaluation and administration of security inobject-oriented databases

The integration of object-oriented programming concepts with databases is one of the most significant advances in the evolution of database systems. Many aspects of such a combination have been studied, but there are few models to provide security for this richly structured information. We develop an authorization model for object-oriented databases. This model consists of a set of policies, a structure for authorization rules, and algorithms to evaluate access requests against the authorization rules. User access policies are based on the concept of inherited authorization applied along the class structure hierarchy. We propose also a set of administrative policies that allow the control of user access and its decentralization. Finally, we study the effect of class structuring changes on authorization     

Machine independent AND and OR parallel execution of logicprograms. I. The binding environment

We describe a binding environment for the AND and OR parallel execution of logic programs that is suitable for both shared and nonshared memory multiprocessors. The binding environment was designed with a view of rendering a compiler using this binding environment machine independent. The binding environment is similar to closed environments proposed by J. Conery. However, unlike Conery's scheme, it supports OR and independent AND parallelism on both types of machines. The term representation, the algorithms for unification and the join algorithms for parallel AND branches are presented in this paper. We also detail the differences between our scheme and Conery's scheme. A compiler based on this binding environment has been implemented on a platform for machine independent parallel programming called the Chare Kernel     

On loop transformations for generalized cycle shrinking

This paper describes several loop transformation techniques for extracting parallelism from nested loop structures. Nested loops can then be scheduled to run in parallel so that execution time is minimized. One technique is called selective cycle shrinking, and the other is called true dependence cycle shrinking. It is shown how selective shrinking is related to linear scheduling of nested loops and how true dependence shrinking is related to conflict-free mappings of higher dimensional algorithms into lower dimensional processor arrays. Methods are proposed in this paper to find the selective and true dependence shrinkings with minimum total execution time by applying the techniques of finding optimal linear schedules and optimal and conflict-free mappings proposed by W. Shang and A.B. Fortes     

Scheduling DAG's for asynchronous multiprocessor execution

A new approach is given for scheduling a sequential instruction stream for execution “in parallel” on asynchronous multiprocessors. The key idea in our approach is to exploit the fine grained parallelism present in the instruction stream. In this context, schedules are constructed by a careful balancing of execution and communication costs at the level of individual instructions, and their data dependencies. Three methods are used to evaluate our approach. First, several existing methods are extended to the fine grained situation. Our approach is then compared to these methods using both static schedule length analyses, and simulated executions of the scheduled code. In each instance, our method is found to provide significantly shorter schedules. Second, by varying parameters such as the speed of the instruction set, and the speed/parallelism in the interconnection structure, simulation techniques are used to examine the effects of various architectural considerations on the executions of the schedules. These results show that our approach provides significant speedups in a wide-range of situations. Third, schedules produced by our approach are executed on a two-processor Data General shared memory multiprocessor system. These experiments show that there is a strong correlation between our simulation results, and these actual executions, and thereby serve to validate the simulation studies. Together, our results establish that fine grained parallelism can be exploited in a substantial manner when scheduling a sequential instruction stream for execution “in parallel” on asynchronous multiprocessors     

Pipelining and bypassing in a VLIW processor

This short note describes issues involved in the bypassing mechanism for a very long instruction word (VLIW) processor and its relation to the pipeline structure of the processor. The authors first describe the pipeline structure of their processor and analyze its performance and compare it to typical RISC-style pipeline structures given the context of a processor with multiple functional units. Next they study the performance effects of various bypassing schemes in terms of their effectiveness in resolving pipeline data hazards and their effect on the processor cycle time     

Second-order bounds on the domain of attraction and the rate ofconvergence of nonlinear dynamical systems and neural networks

We present a method for analyzing the convergence properties of nonlinear dynamical systems yielding second-order bounds on the domain of attraction of an asymptotically stable equilibrium point and on the time of convergence in the estimated domain. We show that under certain conditions on the system, there exists an analytic solution to the corresponding optimization problem. The method is applied in analyzing the dynamics of a neural network model.     

Neural network control of communications systems

Neural networks appear well suited to applications in the control of communications systems for two reasons: adaptivity and high speed. This paper describes application of neural networks to two problems, admission control and switch control, which exploit the adaptivity and speed property, respectively. The admission control problem is the selective admission of a set of calls from a number of inhomogeneous call classes, which may have widely differing characteristics as to their rate and variability of traffic, onto a network. It is usually unknown in advance which combinations of calls can be simultaneously accepted so as to ensure satisfactory performance. The approach adopted is that key network performance parameters are observed while carrying various combinations of calls, and their relationship is learned by a neural network structure. The network model chosen has the ability to interpolate or extrapolate from the past results and the ability to adapt to new and changing conditions. The switch control problem is the service policy used by a switch controller in transmitting packets. In a crossbar switch with input queueing, significant loss of throughput can occur when head-of-line service order is employed. A solution can be based on an algorithm which maximizes throughput. However since this solution is typically required in less than one microsecond, software implementation policy is infeasible. We will carry out an analysis of the benefits of such a policy, describe some existing proposed schemes for its implementation, and propose a further scheme that provides this submicrosecond optimization.     

A delta transform approach to loop gain-phase shaping design of robust digital control systems

This paper addresses the existence of loop gain-phase shaping (LGPS) solutions for the design of robust digital control systems for SISO, minimum-phase, continuous-time processes with parametric uncertainty. We develop the frequency response properties of LGPS for discrete-time systems using the Δ-transform, a transform method that applies to both continuous-time and discrete-time systems. A theorem is presented which demonstrates that for reasonable specifications there always exists a sampling period such that the robust digital control problem has a solution. Finally, we offer a procedure for estimating the maximum feasible sampling period for LGPS solutions to robust digital control problems.     

Robust crossfeed design for hovering rotorcraft

Control law design for rotorcraft fly-by-wire systems normally attempts to decouple the angular responses using fixed-gain crossfeeds. This approach can lead to poor decoupling over the frequency range of pilot inputs and increase the load on the feedback loops. In order to improve the decoupling performance, dynamic crossfeeds should be adopted. Moreover, because of the large changes that occur in the aircraft dynamics due to small changes about the nominal design condition, especially for near-hovering flight, the crossfeed design must be ‘robust’. A new low-order matching method is presented here to design robust crossfeed compensators for multi-input, multi-output (MIMO) systems. The technique minimizes cross-coupling given an anticipated set of parameter variations for the range of flight conditions of concern. Results are presented in this paper of an analysis of the pitch/roll coupling of the UH-60 Black Hawk helicopter in near-hovering flight. A robust crossfeed is designed that shows significant improvement in decoupling perfomance and robustness over the fixed-gain or single point dynamic compensators. The design method and results are presented in an easily used graphical format that lends significant physical insight to the design procedure. This plant precompensation technique is an appropriate preliminary step to the design of robust feedback control laws for rotorcraft.     

MEETING THE IT CHALLENGES OF BUSINESS The Changing Mandate for MBAs

What is the implication for business when information technology (IT) changes in the workplace without a commensurate change in the composition of business programs educating tomorrow's employees? A survey of MBA graduates forms the basis of this article on the IT skills needed in the marketplace.