Large-scale simulation studies in image pattern recognition

Many obstacles to progress in image pattern recognition result from the fact that per-class distributions are often too irregular to be well-approximated by simple analytical functions. Simulation studies offer one way to circumvent these obstacles. We present three closely related studies of machine-printed character recognition that rely on synthetic data generated pseudo-randomly in accordance with an explicit stochastic model of document image degradations. The unusually large scale of experiments - involving several million samples that makes this methodology possible have allowed us to compute sharp estimates of the intrinsic difficulty (Bayes risk) of concrete image recognition problems, as well as the asymptotic accuracy and domain of competency of classifiers     

The case for technology in developing regions

Alongside good governance, technology is considered among the greatest enablers for improved quality of life. However, the majority of its benefits have been concentrated in industrialized nations and therefore limited to a fraction of the world's population. We believe that technology has a large role to play in developing regions, that "First World" technology to date has been a poor fit in these areas, and that there is thus a need for technology research for developing regions. Despite the relative infancy of technology studies in developing regions, anecdotal evidence suggests that access to technology has a beneficial economic impact. Cellular telephony is probably the most visible application, but there are many others, some of which we cover in this article. The World Bank's infoDev site catalogs hundreds of information and communications technologies (ICT) projects, albeit not all successful. Most of these projects use existing off-the-shelf technology designed for the industrialized world. Although it is clear that there are large differences in assumptions related to cost, power, and usage, there has been little work on how technology needs in developing regions differ from those of industrialized nations. We argue that Western market forces continue to meet the needs of developing regions accidentally at best.     

Modeling and measurement of simultaneous switching noise coupling through signal via transition

The signal via is a heavily utilized interconnection structure in high-density System-on-Package (SoP) substrates and printed circuit boards (PCBs). Vias facilitate complicated routings in these multilayer structures. Significant simultaneous switching noise (SSN) coupling occurs through the signal via transition when the signal via suffers return current interruption caused by reference plane exchange. The coupled SSN decreases noise and timing margins of digital and analog circuits, resulting in reduction of achievable jitter performance, bit error ratio (BER), and system reliability. We introduce a modeling method to estimate SSN coupling based on a balanced transmission line matrix (TLM) method. The proposed modeling method is successfully verified by a series of time-domain and frequency-domain measurements of several via transition structures. First, it is clearly verified that SSN coupling causes considerable clock waveform distortion, increases jitter and noise, and reduces margins in pseudorandom bit sequence (PRBS) eye patterns. We also note that the major frequency spectrum component of the coupled noise is one of the plane pair resonance frequencies in the PCB power/ground pair. Furthermore, we demonstrate that the amount of SSN noise coupling is strongly dependent not only on the position of the signal via, but also on the layer configuration of the multilayer PCB. Finally, we have successfully proposed and confirmed a design methodology to minimize the SSN coupling based on an optimal via positioning approach.     

What is wrong with the existing reliability prediction methods?

Inaccurate reliability predictions could lead to disasters such as in the case of the U.S. Space Shuttle failure. The question is: ‘what is wrong with the existing reliability prediction methods?’ This paper examines the methods for predicting reliability of electronics. Based on information in the literature the measured vs predicted reliability could be as far apart as five to twenty times. Reliability calculated using the five most commonly used handbooks showed that there could be a 100 times variation. The root cause for the prediction inaccuracy is that many of the first-order effect factors are not explicitly included in the prediction methods. These factors include thermal cycling, temperature change rate, mechanical shock, vibration, power on/off, supplier quality difference, reliability improvement with respect to calendar years and ageing. As indicated in the data provided in this paper any one of these factors neglected could cause a variation in the predicted reliability by several times. The reliability vs ageing-hour curve showed that there was a 10 times change in reliability from 1000 ageing-hours to 10,000 ageing-hours. Therefore, in order to increase the accuracy of reliability prediction the factors must be incorporated into the prediction methods.     

Toward best-effort services over WDM networks with fair access andminimum bandwidth guarantee

Most existing wavelength-division multiplexed (WDM) networks employ circuit switching, typically with one session having exclusive use of one entire wavelength. Consequently, they are not suitable for data applications involving bursty traffic patterns. The All-Optical Network (AON) Consortium has developed an all-optical LAN/MAN test bed which provides time-slotted WDM service. We explore extensions of this service to achieve fine-grained statistical multiplexing with different virtual circuits time sharing the wavelengths in a fair manner. We develop a very fast, best effort time-slotted WDM network protocol with very good fairness and throughput characteristics. As an additional design feature, our protocol supports the assignment of guaranteed bandwidths (GBW) to selected sessions. This feature acts as a first step toward supporting integrated services at the optical layer in WDM networks     

Hollow Silica Spheres of Controlled Size and Porosity by Sol—Gel Processing

A new technique particularly suitable for fabricating uniform, hollow silica spheres of controlled size and porosity is described. The technique, which combines sol—gel processing with a hollow-drop generation technique, consists of producing a continuous stream of uniform, hollow drops of a tetraethyl orthosilicate solution and then converting the drops into a rigid form by exposing them to an ammoniated vapor gelation medium. The parameters controlling the properties of the resulting silica spheres are the detailed chemical makeup of the reactant solution and the gelation medium, and the dimensions and relative positions of the nozzles used for drop generation.     

A monolithic InP/SOI platform for integrated photonics

The deployment of photonic integrated circuits (PICs) necessitates an integration platform that is scalable, high-throughput, cost-effective, and power-efficien...