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991.
The counter current heat exchanger theory with periodic inlet temperatures has been applied to analyze the thermal performance of a water heating system. The theoretical results obtained are in agreement with the experimental data reported in the literature. 相似文献
992.
993.
994.
The analysis of piezometric levels, water inflows and hydrochemical data at the Donkin-Morien Development Project No. 3 tunnel has revealed a flow regime characterised by discontinuity networks rather than intergranular permeability. Above chainage 420 m, water inflows were encountered from a minor aquifer unit being recharged by percolation travelling down dip from outcrop. Below chainage 420 m, the inflows become predominantly more saline, with recharge occurring either vertically or down dip from seabed, while below chainage 500 m the disappearance of the aquifer unit resulted in no further inflows being encountered. A freshwater/saltwater interface was identified in the vicinity of chainage 420 m. 相似文献
995.
Gubenko A. Krestnikov I. Livshtis D. Mikhrin S. Kovsh A. West L. Bornholdt C. Grote N. Zhukov A. 《Electronics letters》2007,43(25):1430-1431
A comb-generating laser suitable for DWDM application is demonstrated on the basis of a multimode quantum-dot laser. Bit error rate < 10-13 at 10 Gbit/s external modulation was measured for 10 longitudinal modes owing to low (<0.3% over 0.001-10 GHz) relative intensity noise of each individual mode. 相似文献
996.
Subalpine fir (Abies lasiocarpa Hook) lumber containing wetpockets (wetwood) was used for the measurements of gas permeability and the results were then compared to the gas permeability of normal wood, which was free of the wetpockets. The impacts of pretreatment methods were also investigated, including steaming at green condition, steaming at fiber saturation point (FSP), microwave treatment, and radio-frequency treatment. Results from this study demonstrated that both the transverse and the longitudinal gas permeability of subalpine fir wetwood are greater than that of normal wood. There is no significant change in the permeability after 4-h steaming pretreatment at green condition and at FSP. The impacts of microwave and radio-frequency pretreatments were not significant, but the findings cannot be generalized because they may depend on the power intensity applied. 相似文献
997.
A compact, easy-to-use, low-cost spectrometer for solving the chirped spectrum of DFB lasers is demonstrated using narrowband Fabry-Perot etalons with resolutions comparable to grating spectrometers. Time-resolved chirp measurements of Gbit/s NRZ and gain-switched DFB laser pulses are presented.<> 相似文献
998.
Akinwande A.I. Ruden P.P. Vold P.J. Han C.-J. Grider D.E. Narum D.H. Nohava T.E. Nohava J.C. Arch D.K. 《Electron Devices, IEEE Transactions on》1989,36(10):2204-2216
A planar ion-implanted self-aligned gate process for the fabrication of high-speed digital and mixed analog/digital LSI/VLSI integrated circuits is reported. A 4-b analog-to-digital converter, a 2500-gate 8×8 multiplier/accumulator, and a 4500-gate 16×16 complex multiplier have been demonstrated using enhancement-mode n+ -(Al,Ga)As/MODFETs, superlattice MODFETs, and doped channel heterostructure field-effect transistors (FETs) whose epitaxial layers were grown by molecular-beam epitaxy. With nominal 1-μm gate-length devices, direct-coupled FET logic ring oscillators with realistic circuit structures have propagation delays of 30 ps/stage at a power dissipation of 1.2 mW/stage. In LSI circuit operation, these gates have delays of 89 ps/gate at a power dissipation of 1.38 mW/gate when loaded with an average fan-out of 2.5 gates and about 1000 μm of high-density interconnects. High-performance voltage comparator circuits operated at sampling rates greater than 2.5 GHz at Nyquist analog input rates and with static hysteresis of less than 1 mV at room temperature. Fully functional 4-b analog-to-digital circuits operating at frequencies up to 2 GHz were obtained 相似文献
999.
The design, implementation, and experimental results for a ternary content addressable search engine chip, known as the Database Accelerator (DBA), are discussed. The DBA chip architecture is presented. It is well suited to serve as a coprocessor for a variety of logic search applications. The core of the DBA system is composed of novel high-density content addressable memory (CAM) cells capable of storing three states. The design of these cells and their support circuitry are described. The CAM cell and support circuitry were fabricated and their operation confirmed. The circuit implementation of the DMA data path is described with particular emphasis on the optimization of the multiple response resolver. The timing and control methodology, which simultaneously satisfies the complexity, speed, and robustness requirements of the DBA chip, are reported. Experimental DBA chip results that verify the full functionality and testability of the design are presented 相似文献
1000.