Total transfer capability computation for multi-area power systems

This paper presents a method for multi-area power system total transfer capability (TTC) computation. This computation takes into account the limits on the line flows, bus voltage magnitude, generator reactive power, voltage stability, as well as the loss of line contingencies. The multi-area TTC problem is solved by using a network decomposition approach based on REI-type network equivalents. Each area uses REI equivalents of external areas to compute its TTC via the continuation power flow (CPF). The choice and updating procedure for the continuation parameter employed by the CPF is implemented in a distributed but coordinated manner. The proposed method leads to potential gains in the computational efficiency with limited data exchanges between areas. The developed procedure is successfully applied to the three-area IEEE 118-bus test system. Numerical comparisons between the integrated and the proposed multi-area solutions are presented for validation.     

A Petri net based approach to modeling and scheduling for an FMSand a case study

In this paper, a timed-place Petri net (TPPN) model for flexible manufacturing systems (FMSs) is constructed, which contains two major submodels: the stationary transportation model; and the variable process flow model. For multiple automated guided vehicle (AGV) systems, the authors embed a simple rule and introduce a push-AGV strategy in a TPPN model to solve the collision and traffic jam problems of such vehicles. Since a firing sequence of the TPPN from the initial marking to the final marking can be seen as a schedule of the modeled FMS, by using an A^* based search algorithm, namely, the limited-expansion A algorithm, an effective schedule of the part processing can be obtained. To show the promising potential of the proposed work, a prototype FMS is used as a target system for implementation. The experiment results assert that the job-shop scheduling problem can always be satisfactorily solved     

Suppression of boron penetration in p+ polysilicon gateP-MOSFETs using low-temperature gate-oxide N2O anneal

It has been reported that high-temperature (~1100°C) N₂ O-annealed oxide can block boron penetration from poly-Si gates to the silicon substrate. However, this high-temperature step may be inappropriate for the low thermal budgets required of deep-submicron ULSI MOSFETs. Low-temperature (900~950°C) N₂O-annealed gate oxide is also a good barrier to boron penetration. For the first time, the change in channel doping profile due to compensation of arsenic and boron ionized impurities was resolved using MOS C-V measurement techniques. It was found that the higher the nitrogen concentration incorporated at Si/SiO₂ interface, the more effective is the suppression of boron penetration. The experimental results also suggest that, for 60~110 Å gate oxides, a certain amount of nitrogen (~2.2%) incorporated near the Si/SiO₂ interface is essential to effectively prevent boron diffusing into the underlying silicon substrate     

Mechanism analysis of gate-induced drain leakage in off-state n-MOSFET

An analytical expression for both band-to-band and band-trap-band indirect tunnelings is used to study the gate-induced drain leakage (GIDL) current of MOSFETs measured before and after hot-carrier stress. The voltage and temperature dependence of GIDL are characterized. Both results show that interface traps situated near the midgap participate in the conduction of GIDL, and band-trap-band indirect tunneling could be the major mechanism. This is further supported by the fact that the percentage increase in GIDL induced by hot-carrier stress is about the same as the corresponding increase in interface-trap density. On the other hand, under low-field conditions, trap-assisted Poole–Frenkle emission dominates over tunneling for temperatures even well below room temperature.     

Ultralow sidelobe-level integrated acoustooptic tunable filtersusing tapered-gap surface acoustic wave directional couplers

We propose a new weighted-coupling scheme using tapered-gap surface acoustic wave directional couplers for realization of ultralow sidelobe-level integrated acoustooptic tunable filters (IAOTF's). Appropriate design analysis has been carried out for 30-mm-long filters operating at an optical wavelength of 1.55 μm in an X-cut Y-propagating LiNbO₃ substrate. New synthesized weighting functions have been used for the improvement of sidelobe level suppression over existing single-stage filters by as much as 27 dB. The -20 dB mainlobe width of the resulting IAOTF's varies from 2.7 to 3.9 nm only for the worst sidelobe levels ranging from -30.6 to -44.7 dB, respectively. It has also been shown that further suppression of sidelobe levels by 3-9 dB is possible if the filter is underdriven at 80% mode-conversion efficiency     

P-N double quantum well resonant interband tunneling diode withpeak-to-valley current ratio of 144 at room temperature

The current-voltage characteristics of the P-N double quantum well resonant interband tunneling (RIT) diodes in InAlAs-InGaAs system have been improved in this letter. The peak-to-valley current ratio (PVCR) is as high as 144 at room temperature. As we know, this is the highest room temperature PVCR ever reported in any tunneling devices. Moreover, the influence of the central barrier thickness varying from 10 Å to 30 Å on the device characteristics is also studied     

Fuzzy consecutive-k-out-of-n:F system reliability

In this paper, we propose a new method to analyze fuzzy consecutive-k-out-of-n:F system reliability using fuzzy GERT. The triangular fuzzy numbers are used to fuzzify probabilities of the consecutive-k-out-of-n:F system and the interval arithmetic, α-cuts and an index of optimism λ are applied to compute fuzzy consecutive-k-out-of-n:F system reliability on fuzzy the GERT network. Futhermore, we can obtain all computation results by “MATHEMATICA” package.