Electrical linewidth test structures fabricated in monocrystallinefilms for reference-material applications

The physical widths of reference features incorporated into electrical linewidth test structures patterned in films of monocrystalline silicon have been determined from Kelvin voltage measurements. The films in which the test structures are patterned are electrically insulated from the bulk-silicon substrate by a layer of silicon dioxide provided by SIMOX (Separation by the IMplantation of OXygen) processing. The motivation is to facilitate the development of linewidth reference materials for critical-dimension (CD) metrology-instrument calibration. The selection of the (110) orientation of the starting silicon and the orientation of the structures' features relative to the crystal lattice enable a lattice-plane-selective etch to generate reference-feature properties of rectangular cross section and atomically planar sidewalls. These properties are highly desirable for CD applications in which feature widths are certified with nanometer-level uncertainty for use by a diverse range of CD instruments. End applications include the development and calibration of new generations of CD instruments directed at controlling processes for manufacturing devices having sub-quarter-micrometer features     

A unified diode model for circuit simulation

A new commercially available diode model is described. This unified model is capable of simulating the widest range of diode technologies of any presently available. The emphasis of this paper is on describing the model's extensive features and flexibility in the different domains of operation and is of particular interest in power applications     

Soft commutation in capacitive idling converters

The capacitive idling converters derived from the Cuk, SEPIC, Zeta, and flyback topologies allow soft commutation of power switches without the need for additional circuitry, making it possible to increase the switching frequency while maintaining high efficiency     

Quantization effects in digitally behaving circuit implementationsof Kohonen networks

Implementing a neural network on a digital or mixed analog and digital chip yields the quantization of the synaptic weights dynamics. This paper addresses this topic in the case of Kohonen's self-organizing maps. We first study qualitatively how the quantization affects the convergence and the properties, and deduce from this analysis the way to choose the parameters of the network (adaptation gain and neighborhood). We show that a spatially decreasing neighborhood function is far more preferable than the usually rectangular neighborhood function, because of the weight quantization. Based on these results, an analog nonlinear network, integrated in a standard CMOS technology, and implementing this spatially decreasing neighborhood function is then presented. It can be used in a mixed analog and digital circuit implementation.     

E-kernel: an embedding kernel on the IBM victor V256 multiprocessorfor program mapping and network reconfiguration

We present the design of E-kernel, an embedding kernel on the Victor V256 message-passing partitionable multiprocessor, developed for the support of program mapping and network reconfiguration. E-kernel supports the embedding of a new network topology onto Victor's 2D mesh and also the embedding of a task graph onto the 2D mesh network or the reconfigured network. In the current implementation, the reconfigured network can be a line or an even-size ring, and the task graphs meshes or tori of a variety of dimensions and shapes or graphs with similar topologies. For application programs having these task graph topologies and that are designed according to the communication model of E-kernel, they can be run without any change on partitions connected by the 2D mesh, line, or ring. Further, E-kernel attempts the communication optimization of these programs on the different networks automatically, thus making both the network topology and the communication optimization attempt completely transparent to the application programs. Many of the embeddings used in E-kernel are optimal or asymptotically optimal (with respect to minimum dilation cost). The implementation of E-kernel translated some of the many theoretical results in graph embeddings into practical tools for program mapping and network reconfiguration in a parallel system. E-kernel is functional on Victor V256. Measurements of E-kernel's performance on V256 are also included