A high-throughput and high-capacity IPv6 routing lookup system

With the growing number of routing entries, IP routing lookup has become the major performance bottleneck in backbone routers. In this paper, a complete hardware-based routing lookup system is proposed to achieve high-throughput and high-capacity for IPv6. The proposed system is a cache-centric, hash-based architecture that contains a routing lookup application specific integrated circuit (ASIC) and a memory set. A hash function is used to reduce lookup time for the routing table and ternary content addressable memory (TCAM) effectively resolves the collision problem. The gate count of the ASIC, excluding the binary content addressable memory (BCAM), is about 5306 gates, using an in-house 0.18 μm CMOS single-poly six-metal standard cell library. The results of post-layout simulations show that the ASIC operates in 3.6 ns so that the routing lookup system approaches 260 Mega lookups per second (Mlps), which is sufficient for 100 Gbps networks. The memory density is good, with each routing entry requiring only 64 bits. Moreover, the routing table only needs 10.24 KB on-chip BCAM, 20.04 KB off-chip TCAM and 29.29 MB DRAM for 3.6 M routing entries in the proposed system.     

A New Geometric Subproblem to Extend Solvability of Inverse Kinematics Based on Screw Theory for 6R Robot Manipulators

Geometric inverse kinematics procedures that divide the whole problem into several subproblems with known solutions, and make use of screw motion operators have been developed in the past for 6R robot manipulators. These geometric procedures are widely used because the solutions of the subproblems are geometrically meaningful and numerically stable. Nonetheless, the existing subproblems limit the types of 6R robot structural configurations for which the inverse kinematics can be solved. This work presents the solution of a novel geometric subproblem that solves the joint angles of a general anthropomorphic arm. Using this new subproblem, an inverse kinematics procedure is derived which is applicable to a wider range of 6R robot manipulators. The inverse kinematics of a closed curve were carried out, in both simulations and experiments, to validate computational cost and realizability of the proposed approach. Multiple 6R robot manipulators with different structural configurations were used to validate the generality of the method. The results are compared with those of other methods in the screw theory framework. The obtained results show that our approach is the most general and the most efficient.

     

Robust H infinity fuzzy control for a class of uncertain discrete fuzzy bilinear systems.

The main theme of this paper is to present robust fuzzy controllers for a class of discrete fuzzy bilinear systems. First, the parallel distributed compensation method is utilized to design a fuzzy controller, which ensures the robust asymptotic stability of the closed-loop system and guarantees an H(infinity) norm-bound constraint on disturbance attenuation for all admissible uncertainties. Second, based on the Schur complement and some variable transformations, the stability conditions of the overall fuzzy control system are formulated by linear matrix inequalities. Finally, the validity and applicability of the proposed schemes are demonstrated by a numerical simulation and the Van de Vusse example.     

Img2Logo: Generating Golden Ratio Logos from Images

Logos are one of the most important graphic design forms that use an abstracted shape to clearly represent the spirit of a community. Among various styles of abstraction, a particular golden-ratio design is frequently employed by designers to create a concise and regular logo. In this context, designers utilize a set of circular arcs with golden ratios (i.e., all arcs are taken from circles whose radii form a geometric series based on the golden ratio) as the design elements to manually approximate a target shape. This error-prone process requires a large amount of time and effort, posing a significant challenge for design space exploration. In this work, we present a novel computational framework that can automatically generate golden ratio logo abstractions from an input image. Our framework is based on a set of carefully identified design principles and a constrained optimization formulation respecting these principles. We also propose a progressive approach that can efficiently solve the optimization problem, resulting in a sequence of abstractions that approximate the input at decreasing levels of detail. We evaluate our work by testing on images with different formats including real photos, clip arts, and line drawings. We also extensively validate the key components and compare our results with manual results by designers to demonstrate the effectiveness of our framework. Moreover, our framework can largely benefit design space exploration via easy specification of design parameters such as abstraction levels, golden circle sizes, etc.     

An RFID anti-collision algorithm with dynamic condensation and ordering binary tree

In many RFID applications, the reader repeatedly identifies the same staying tags. Existing anti-collision protocols can rapidly identify the staying tags by remembering the order in which the tags were recognized in the previous identification process. This paper proposes a novel protocol, dynamic blocking adaptive binary splitting (DBA), based on the blocking mechanism, which prevents the newly-arriving tags from colliding with the staying tags. Moreover, DBA utilizes a dynamic condensation technique to reduce the number of idle slots produced when recognized tags leave. Following the condensation process, multiple staying tags may be required to share the same slot, and thus may cause collisions among them. Accordingly, an efficient ordering binary tree mechanism is proposed to split the collided tags deterministically according to the order in which they were recognized. The analytical and simulation results show that DBA consistently outperforms previous algorithms in all of the considered environments.     

SNS collaborative learning design: enhancing critical thinking for human–computer interface design

Universal Access in the Information Society - In many cases, classrooms seem to be functioning as well as ever, though the challenges and expectations have changed quite dramatically. This study...     

Efficient algorithms for mining closed itemsets and their lattice structure

The set of frequent closed itemsets uniquely determines the exact frequency of all itemsets, yet it can be orders of magnitude smaller than the set of all frequent itemsets. In this paper, we present CHARM, an efficient algorithm for mining all frequent closed itemsets. It enumerates closed sets using a dual itemset-tidset search tree, using an efficient hybrid search that skips many levels. It also uses a technique called diffsets to reduce the memory footprint of intermediate computations. Finally, it uses a fast hash-based approach to remove any "nonclosed" sets found during computation. We also present CHARM-L, an algorithm that outputs the closed itemset lattice, which is very useful for rule generation and visualization. An extensive experimental evaluation on a number of real and synthetic databases shows that CHARM is a state-of-the-art algorithm that outperforms previous methods. Further, CHARM-L explicitly generates the frequent closed itemset lattice.     

GPU accelerated tensor contractions in the plaquette renormalization scheme

We use the graphical processing unit (GPU) to accelerate the tensor contractions, which is the most time consuming operations in the variational method based on the plaquette renormalized states. Using a frustrated Heisenberg J₁–J₂ model on a square lattice as an example, we implement the algorithm based on the compute unified device architecture (CUDA). For a single plaquette contraction with the bond dimensions C = 3 of each rank of the tensor, results are obtained 25 times faster on GPU than on a current CPU core. This makes it possible to simulate systems with the size 8 × 8 and larger, which are extremely time consuming on a single CPU. This technology successfully relieves the computing time dependence with C, while in the CPU serial computation, the total required time scales both with C and the system size.