Quantitative image quality analysis of a nonlinear spatio-temporalfilter

Digital temporal and spatial filtering of fluoroscopic image sequences can be used to improve the quality of images acquired at low X-ray exposure. In this study, we characterized a nonlinear edge preserving, spatio-temporal noise reduction filter, the bidirectional multistage (BMS) median filter of Arce (1991). To assess image quality, signal detection and discrimination experiments were performed on stationary targets using a four-alternative forced-choice paradigm. A measure of detectability, d', was obtained for filtered and unfiltered noisy image sequences at different signal amplitudes. Filtering gave statistically significant, average d' improvements of 20% (detection) and 31% (discrimination). A nonprewhitening detection model modified to include the human spatio-temporal visual system contrast-sensitivity underestimated enhancement, predicting an improvement of 6%. Pixel noise standard deviation, a commonly applied image quality measure, greatly overestimated effectiveness giving 67% improvement in d'. We conclude that human testing is required to evaluate the filter effectiveness and that human perception models must be improved to account for the spatio-temporal filtering of image sequences.     

Predicting the number of contacts and dimensions of full-customintegrated circuit blocks using neural network techniques

Block layout dimension prediction is an important activity in many very large scale integration computer-aided design tasks, among them structural synthesis, floor planning and physical synthesis. Block layout dimension prediction is harder than block area prediction and has been previously considered to be intractable. The authors present a solution to this problem using a neural network machine learning approach. The method uses a neural network to predict first the number of contacts; then another neural network uses this prediction and other circuit features to predict the width and the height of its layout. The approach has produced much better results than those published-a dimension (aspect ratio) prediction average error of less than 18% with a corresponding area prediction average error of less than 15%. Furthermore, the technique predicts the number of contacts in a circuit with less than 4% error on average.     

Polyphenol composition and antioxidant activity of cumin (Cuminum cyminum L.) seed extract under drought

This research evaluated the effect of drought on total and individual polyphenol contents as well as the antioxidant activities of cumin (Cuminum cyminum L.) seeds of 2 geographic origins, Tunisia (TCS) and India (ICS). Plants were treated with different levels of water deficit: control. Our results indicated that, in both varieties, moderate water deficit (MWD) improved the number of umbels per plant as well as the number of umbellets per umbel and the seed yield, in comparison to the control, but it decreased under severe water deficit (SWD). Besides, total phenolic contents were higher in the treated seeds and drought increased the level of total and individual polyphenols. This increase was appreciably more important in TCS than in ICS. Moreover, antioxidant activities of the extracts were determined by 4 different test systems, namely 2,2-diphenyl-1-picrylhydrazyl, β-carotene/linoleic acid chelating, and reducing power assays, and showed that treated seeds exhibited the highest activity, for both TCS and ICS.     

Handwritten digit recognition by adaptive-subspace self-organizingmap (ASSOM)

The adaptive-subspace self-organizing map (ASSOM) proposed by Kohonen is a recent development in self-organizing map (SOM) computation. In this paper, we propose a method to realize ASSOM using a neural learning algorithm in nonlinear autoencoder networks. Our method has the advantage of numerical stability. We have applied our ASSOM model to build a modular classification system for handwritten digit recognition. Ten ASSOM modules are used to capture different features in the ten classes of digits. When a test digit is presented to all the modules, each module provides a reconstructed pattern and the system outputs a class label by comparing the ten reconstruction errors. Our experiments show promising results. For relatively small size modules, the classification accuracy reaches 99.3% on the training set and over 97% on the testing set.     

A silicon basis for synaptic plasticity

This paper describes analogue VLSI synaptic circuitry incorporating two forms of plasticity: a nonassociative mechanism analogous to paired-pulse facilitation (PPF), and an associative form of adaptation analogous to the short-term potentiation (STP) variety of plasticity. Simulation results demonstrate expected temporal characteristics of the plasticity mechanisms. The time-course of decay of associative potentiation is established by utilising diode leakage current.     

A Micropower Adaptive Linear Transform Vector Quantiser

Micropower signal classification and compression are becoming important requirements for implantable cardioverter defibrillators although they are currently limited by power and computational constraints. This paper describes an integrated circuit that facilitates Intracardiac Electrogram (ICEG) classification and compression of 30 dimensional analogue vectors while consuming a maximum of 2.5 W power for a heart rate of 60 beats per minute (1 vector per second) from a 3.3 V supply. This represents a significant advance on previous work which achieved ultra low power supervised morphology classification [6] since the templated matching scheme used in this chip enables unsupervised blind classification of abnormal rhythms and the computational support for low bit rate data compression. The adaptive template matching scheme used is tolerant to amplitude variations, and inter- and intra-sample time shifts. Micropower performance is achieved using CMOS analogue circuits biased in weak inversion in order to minimise energy per computation. Results from the fabricated chip demonstrate the impact of the amplitude and shift tolerance on ICEG data and performance for blind classification of an abnormal rhythm in five heart patients. For four out of the five patients, no false negative classifications and a worst case of 11% false positive classifications were made.     

The 3G-324M protocol for conversational video telephony

As mobile operators worldwide migrate to third-generation (3G) networks, conversational video-telephony services are becoming a key differentiator between new 3G offerings and existing 2G/2.5G services. Although it's possible to have limited video-based services - such as a multimedia messaging service - that deliver pictures and video clips over 2.5G services, these are delay-insensitive applications that could run over a packet-based wireless network like general packet radio service (GPRS) or code division multiple access (CDMA)'s 1XRTT. For delay-sensitive applications such as conversational video telephony, present 3G packet bearers are inadequate, and the Third Generation Partnership Project (3GPP; http://www.3gpp.org) mandates using the 3G bandwidth-guaranteed circuit-switched bearer and the 3G-324M system. The 3G-324M system is a derivative of the International Telecommunication Union (ITU) H.324 protocol standard for low-bitrate multimedia communication, which ITU-T developed for the public switched telephone network (PSTN). This article describes the 3G-324M system, which has been adopted by both 3GPP and 3GPP2 (htpp://www.3gpp2.org), as well as its H.324 roots.     

Compact low-power time-based conversion with noise immunity similar to digital conversion

An analog signal representation based on the inter-pulse-interval (IPI) time is presented. Voltage-to-IPI and IPI-to-voltage conversion circuits based on the representation are described. The circuits have been fabricated using a 0.35 μm mixed-signal CMOS process. Simulation and test results agree with the theory. Voltage-to-IPI conversion needs significantly less area and power than ADC and is significantly more immune to noise and other problems than using analog voltage/current signals.     

Algorithmic and implementation issues in analog low power learning neural network chips

Analog sub-threshold is an attractive microelectronic implementation approach for many applications where power is to be minimized. The process of mapping a neural network to a sub-threshold architecture requires the proper selection of a training algorithm. For analog architectures, conventional training algorithms like backpropagation have many drawbacks although they are computationally efficient on digital computers. In this article we present algorithms that are suitable for analog implementation and we present architectures and implementations of sub-threshold neural networks.