An Analysis of Citation Counts of ETRI‐Invented US Patents

From its foundation until 2004, ETRI has registered over 1,000 US patents. This letter analyzes the characteristics of these patents and addresses the explanatory factors affecting their citation counts. For explanatory variables, research team related variables, invention specific variables, and geographical domain related variables are suggested. Zero‐altered count data models are used to test the impact of independent variables. A key finding is that technological cumulativeness, the scale of invention, outputs in the electronic field, and the degree of dependence on the US technology domain positively affect the citation counts of ETRI‐invented US patents. The magnitude of international presence appears to negatively affect the citation counts of ETRI‐invented US patents.     

Synthesis of ZSM‐5 Films and Monoliths with Bimodal Micro/Mesoscopic Structures

A route to synthesize ZSM‐5 crystals with a bimodal micro/mesoscopic pore system has been developed in this study; the successful incorporation of the mesopores within the ZSM‐5 structure was performed using tetrapropylammonium hydroxide (TPAOH)‐impregnated mesoporous materials containing carbon nanotubes in the pores, which were encapsulated in the ZSM‐5 crystals during a solid rearrangement process within the framework. Such mesoporous ZSM‐5 zeolites can be readily obtained as powders, thin films, or monoliths.     

Passive alignment method of polymer PLC devices by using a hot embossing technique

A novel fabrication process using a hot embossing technique has been developed for micromechanical passive alignment of polymer planar lightwave circuit (PLC) devices. With only one step of embossing, single-mode waveguide straight channels and micropedestals for passive aligning are simultaneously defined on a polymer thin film with an accuracy of /spl plusmn/0.5 /spl mu/m. This process reduces the steps for fabricating alignment structures. A fabricated polymer PLC chip and fibers are combined on a v-grooved silicon optical bench (SiOB) in a flip-chip manner. The process provides a coupling loss as low as 0.67 dB per coupling face and a cost-effective packaging solution for various polymer PLC devices.     

Scaling planar silicon devices

The generation-over-generation scaling of critical CMOS technology parameters is ultimately bound by nonscalable limitations, such as the thermal voltage and the elementary electronic charge. Sustained improvement in performance and density has required the introduction of new device structures and materials. Partially depleted SOI, a most recent MOSFET innovation, has extended VLSI performance while introducing unique idiosyncrasies. Fully depleted SOI is one logical extension of this device design direction. Gate dielectric tunneling, device self-heating, and single-event upsets present developers of these next-generation devices with new challenges. Strained silicon and high-permittivity gate dielectric are examples of new materials that will enable CMOS developers to continue to deliver device performance enhancements in the sub-100 nm regime.     

Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation

The authors report on the effects of silicon nitride (SiN) surface passivation and high-electric field stress (hot electron stress) on the degradation of undoped AlGaN-GaN power HFETs. Stressed devices demonstrated a decrease in the drain current and maximum transconductance and an increase in the parasitic drain series resistance, gate leakage, and subthreshold current. The unpassivated devices showed more significant degradation than SiN passivated devices. Gate lag phenomenon was observed from unpassivated devices and removed by SiN passivation. However, SiN passivated devices also showed gate lag phenomena after high-electric field stress, which suggests possible changes in surface trap profiles occurred during high-electric field stress test.     

High-performance MIM capacitor using ALD high-k HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectrics

For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.     

A new method to suppress harmonics using /spl lambda//4 bias line combined by defected ground structure in power amplifiers

A new /spl lambda//4 bias line combined by a dumb-bell shaped defected ground structure (DGS) is proposed to suppress harmonics in power amplifiers. The proposed DGS bias line maintains the required high impedance even after DGS is inserted, while the width and length of the /spl lambda//4 bias line are broader and shorter than those of conventional bias lines. When the DGS bias line is used in power amplifiers, the third harmonic components as well as the second harmonic are reduced, because of the increased slow-wave effect over wide harmonic band. It is shown that the reduction of the third harmonic component, the improvement of 1 dB compression point, and power added efficiency are 26.5 dB, 0.45 dB, and 9.1%, respectively.     

Transmission performance of 10-Gb/s 1550-nm transmitters using semiconductor optical amplifiers as booster amplifiers

We have demonstrated the transmission performance of 10-Gb/s transmitters based on LiNbO/sub 3/ modulator using semiconductor optical amplifiers (SOAs) as booster amplifiers. Utilizing the negative chirp converted in SOAs and self-phase modulation induced by high optical power, we can successfully transmit 10-Gb/s optical signals over 80 km through the standard single-mode fiber with the transmitter using SOAs as booster amplifiers. SOAs can be used for booster amplifiers with a careful adjustment of the operating conditions. In order to further understand an SOA's characteristics as a booster amplifier, we model SOAs and other subsystems to verify the experimental results. Based on the good agreement between the experimental and simulation results, we can find the appropriate parameters of input signals for SOAs, such as extinction ratio, rising/falling time, and chirp parameter to maximize output dynamic range and available maximum output power (P/sub o,max/).     

Lost retransmission detection for TCP SACK

There have been a lot of works to avoid retransmission timeout (RTO) of transmission control protocol (TCP) that takes place in an unnecessary situation. However, most current TCP implementations, even if selective acknowledgment (SACK) option is used, do not have a mechanism to detect a lost retransmission and avoid subsequent RTO. In this letter, we propose a simple modification that enables a TCP sender using SACK option to detect a lost retransmission, which is called TCP SACK+ in simple. We use a stochastic model to evaluate the performance of TCP SACK+. Numerical results evaluated by simulations show that TCP SACK+ improves the loss recovery of TCP SACK significantly in presence of random losses.     

Geometric derivation of expectation-maximization and generalized successive interference cancellation algorithms with applications to CDMA channel estimation

The expectation-maximization (EM) algorithm is well established as a computationally efficient method for separable signal parameter estimation. Here, a new geometric derivation and interpretation of the EM algorithm is given that facilitates the understanding of EM convergence properties. Geometric considerations lead to an alternative separable signal parameter estimator based on successive cancellation. The new generalized successive interference cancellation (GSIC) algorithm is then applied to multiuser delay and channel estimation for code-division multiple access (CDMA) radiolocation and communication. The radiolocation application uses a handshaking protocol in which multiple reference nodes transmit acknowledge (ACK) CDMA packets to a master node, which then computes round-trip travel times (RTTs). Simulation results comparing EM and GSIC are presented for the CDMA channel-estimation problem.