Picosecond pulse generation with ultralow jitter in 1.5-μmmulticontact MQW lasers using Q-switching

High-peak-power picosecond pulses with ultralow jitter of 65 fs (50-500 Hz) have been generated by Q-switching multi-quantum-well (MQW) distributed-feedback (DFB) and Fabry-Perot (FP) multicontact lasers. Peak pulse powers of 80 mW have been measured for pulses having durations of 26 ps and repetition rates of 1.25 GHz     

Steady-state modeling of resistive-gate MOSFETs

The Pao-Sah model for the long-channel MOSFET is generalized to include MOSFETs with resistive-gate electrodes (RG-MOSFETs). The RG-MOdSFETs current-voltage characteristics are studied using this extended Pao-Sah model. The steady-state operation of the RG-MOSFET can be divided into three regimes, separated by the uniform channel condition and the pinch-off condition, respectively. The regions of operation are discussed, and a simple analytical I-V expression is given for the device     

AlGaInP visible resonant cavity light-emitting diodes

Visible (670-nm) resonant cavity light-emitting diodes (RCLEDs) composed entirely of AlGaInP alloys are discussed. The devices consist of a strained quantum well optical cavity active region surrounded by AlInP/(AlGa)InP distributed Bragg reflectors (DBRs). The bottom DBR is a 60.5 period high reflector while the top partial reflector, which determines the emission linewidth, is a five-period output coupling DBR with a reflectance of about 57%. The devices exhibit linewidths of 4.8 nm (13.3 meV) at 300 K and are promising for plastic fiber communication systems and monochromatic displays     

Array designs for amplitude and phase control of millimeter-wave beams

New array design concepts are described for the phase and amplitude control of millimeter and submillimeter-wave beams. Phase shifter array designs providing increased phase range and wider bandwidth are described. Techniques involving the integration of gain-producing elements as well as tuning elements on a single array are proposed for application to high-performance beam control and beam shaping. These concepts should facilitate the further development of quasi-optical solid state device-based arrays for application to millimeter-wave electronic systems.     

Placement and routing tools for the Triptych FPGA

Field-programmable gate arrays (FPGAs) are becoming an increasingly important implementation medium for digital logic. One of the most important keys to using FPGAs effectively is a complete, automated software system for mapping onto the FPGA architecture. Unfortunately, many of the tools necessary require different techniques than traditional circuit implementation options, and these techniques are often developed specifically for only a single FPGA architecture. In this paper we describe automatic mapping tools for Triptych, an FPGA architecture with improved logic density and performance over commercial FPGAs. These tools include a simulated-annealing placement algorithm that handles the routability issues of fine-grained FPGAs, and an architecture-adaptive routing algorithm that can easily be retargeted to other FPGAs. We also describe extensions to these algorithms for mapping asynchronous circuits to Montage, the first FPGA architecture to completely support asynchronous and synchronous interface applications     

A 22-kHz multibit switched-capacitor sigma-delta D/A converter with92 dB dynamic range

A time- and capacitor-multiplexing technique for use in a highly linear switched-capacitor multibit DAC in sigma-delta data converters is presented. The technique uses subintervals in the sample clock to deliver multiple charge packets to holding capacitors. It avoids distortion effects caused by mismatched capacitors and finite opamp gain. A five-level switched-capacitor DAC using the proposed technique was designed as part of an audio-band multibit sigma-delta D/A converter that achieved a dynamic range of 92 dB and a THD of -93 dB with a low oversampling ratio of 32. No trimming, calibration, or dynamic matching scheme was required. The five-level SC DAC has been fabricated in a 2-μm CMOS process, and testing confirmed the anticipated theoretical results     

A radix-8 wafer scale FFT processor

Wafer Scale Integration promises radical improvements in the performance of digital signal processing systems. This paper describes the design of a radix-8 systolic (pipeline) fast Fourier transform processor for implementation with wafer scale integration. By the use of the radix-8 FFT butterfly wafer that is currently under development, continuous data rates of 160 MSPS are anticipated for FFTs of up to 4096 points with 16-bit fixed point data.     

18-42 GHz experimental verification of microstrip coupler and openend capacitance models

A cavity resonance technique is used to experimentally verify microstrip coupler and open end capacitance models over the frequency range of 18-42 GHz. In addition, these results are confirmed using an alternate version of the technique which directly determines open end discontinuity capacitance. In the second case, knowledge of substrate dielectric constant is not required, and the method also yields the microstrip relative effective dielectric constant     

Investigation of high In content InGaAs quantum wells grown on GaAs by molecular beam epitaxy

Excitonic resonances and the quantum confined Stark effect are observed near 1.3 mu m in InGaAs quantum wells grown on GaAs using a slowly graded InGaAs buffer. The pin structure performs as a modulator with a relative transmission modulation of 12% at 1.3 mu m and as a low leakage photodetector.<>     

A simple model for quantum mechanical effects in hole inversionlayers in silicon PMOS devices

The effects of quantization of the inversion layer of MOSFET devices is an area of increasing importance as technology is aggressively scaled below 0.25 μm. Although electron inversion layers have attracted considerable interest, very little work has been reported for holes. This paper describes the implementation and results of a simple, computationally efficient model, appropriate for device simulators, for predicting the effects of hole inversion layer quantization. This model compares very favorably with experimental results and the predictions of a full-band, self-consistent Schrodinger-Poisson solver