Early voltage in double heterojunction bipolar transistors

The Early voltage for abrupt double heterojunction bipolar transistors (DHBTs) has been calculated by using an effective junction velocity (S_c) at the base-collector heterojunction. S_c is obtained by self-consistently partitioning thermionic and quantum mechanical tunneling currents. Unlike single heterojunction bipolar transistors (SHBTs), the Early voltage varies very rapidly at low reverse bias and approaches the SHBT-limit at sufficiently high reverse bias. This is attributed to the presence of an energy barrier at the b-c heterojunction     

Modeling and Analyzing of Millimeter Wave Heterogeneous Cellular Networks by Poisson Hole Process

Wireless Personal Communications - In this paper, a novel Poisson hole process (PHP) modeling of wireless networks is proposed. Contrary to the prior PHP models with circular-shaped holes, we...     

An all-solid-state broad-band frequency multiplier chain at 1500 GHz

We report the results of a high-performance all-solid-state broad-band frequency multiplier chain at 1500 GHz, which uses four cascaded planar Schottky-barrier varactor doublers. The multipliers are driven by monolithic-microwave integrated-circuit-based high electron-mobility transistor power amplifiers around 95 GHz with 100-150 mW of pump power. The design incorporates balanced doublers utilizing novel substrateless and membrane device fabrication technologies, achieving low-loss broad-band multipliers working in the terahertz range. For a drive power of approximately 100 mW in the 88-99-GHz range, the doublers achieved room-temperature peak efficiencies of approximately 30% at the 190-GHz stage, 20% at 375 GHz, 9% at 750 GHz, and 4% at the 1500-GHz stage. When the chain was cooled to 120 K, approximately 40 /spl mu/W of peak output power was measured for 100 mW of input pump power.     

A Multi-Objective Optimization Approach for Joint Channel Assignment and Multicast Routing in Multi-Radio Multi-Channel Wireless Mesh Networks

Multicast routing is an effective mechanism for delivering data to a group of receivers. Due to intrinsic property of air medium in wireless mesh networks (WMN), interference is an important issue in determining the data rate for multicast services. Interference reduction is handled by assigning multiple orthogonal channels to multiple radios in multi-radio multi-channel WMNs. Channel assignment is known to be a NP-complete problem. Most prior methods have solved multicast routing and channel assignment problems sequentially and have not considered the interplay between these two problems. Focusing on this issue, we address joint channel assignment and routing problem for multicast applications. In this paper, a novel technique based on a multi-objective genetic algorithm is proposed to build a delay constrained minimum cost multicast tree with minimum interference. We have examined the proposed algorithm on different network configurations. Experimental results demonstrate that our method finds better trees in terms of cost, delay, and interference compared to prior methods.     

A New Modified MPPM for High‐Speed Wireless Optical Communication Systems

Previous work proposed combining multipulse pulse position modulation (MPPM) with pulse amplitude modulation to form multipulse amplitude and position modulation (MPAPM), which is a hybrid modulation that results in an improvement in bandwidth efficiency but a degradation in power efficiency. In this paper, to achieve greater power efficiency and a better data rate, we propose multipulse dual amplitude‐width modulation, based on MPAPM and pulse width modulation. The proposed scheme shows a remarkable improvement in data rate and a 1.5‐dB improvement in power efficiency over MPAPM, while sustaining the bandwidth efficiency. After introducing symbol structure, we present the theoretical expressions of spectral efficiency, the power requirements, and the normalized data rate, as well as the results of comparing the proposed modulation to MPPM and MPAPM.     

Very Simple BICM-ID Using Repetition Code and Extended Mapping with Doped Accumulator

This paper proposes very simple bit-interleaved coded modulation with iterative detection (BICM-ID) as a spectrally efficient signal transmission scheme, where irregular repetition code and extended mapping with rate-1 doped accumulator (ACC) are combined to achieve a clear turbo-cliff. Doped ACC is used for close matching of the demapper and decoder??s extrinsic information transfer curves. Although the proposed BICM-ID system is very simple, it can achieve excellent performances and completely eliminate bit-error-rate floor. An exemplifying result for extended non-Gray mapped 4-quadrature amplitude modulation symbol shows that with 0.916 bits/channel use, turbo-cliff happens at 1.27 dB away from the Shannon limit.     

Effect of the Spectrum Sensing Period on the TCP Performance Over Cognitive Radio Ad-hoc Networks

Wireless Personal Communications - Modeling of spectrum occupancy by both primary and secondary users in the Cognitive Radio Ad-hoc Network (CRAHN) can be helpful to improve spectrum usage...     

Toward an integrated dynamic defense system for strategic detecting attacks in cloud networks using stochastic game

Telecommunication Systems - In a complex network as a cloud computing environment, security is becoming increasingly based on deception techniques. To date, the static nature of cyber networks...     

A new on-chip digital BIST for analog-to-digital converters

A fully digital built-in self-test (BIST) for analog-to-digital converters is presented in this paper. This test circuit is capable of measuring the DNL, INL, offset error and gain error, and mainly consists of several registers and some digital subtracters. The main advantage of this BIST is the ability to test DNL and INL for all codes in the digital domain, which in turn eliminates the necessity of calibration. On the other hand, some parts of the analog-to-digital converter with minor modifications are used in the BIST simultaneously. This also reduces the area overhead and the cost of the test. The proposed BIST structure presents a compromise between test accuracy, area overhead and test cost. The BIST circuitry has been designed using Mitel CMOS 1.5 μm technology. The simulation results of the test show that it can be applied to medium resolution analog-to-digital converters or high resolution pipelined analog-to-digital converters. The presented BIST shows satisfactory results for a nine-bit pipe-lined analog-to-digital converter.