Turbulence and drag control in jet and wake flows

Structures of plane and circular jets were modified by using active, passive and an active-passive (hybrid) combination to investigate the phenomenon of turbulence control using hot-wire anemometry. Active control was achieved by exciting the flow by using either an acoustic speaker or vibrating piezoceramic elements, whereas passive control was achieved by placing a slender object such as a thin wire or a ring, a mesh or a honeycomb section downstream of the nozzle exit plane. Turbulence enhancement and suppression in plane-and circular-jet mixing layers could be achieved by employing active techniques, whereas passive techniques essentially yielded turbulence reduction. For a circular cylinder, a significant reduction in drag was obtained by placing a cylinder of small diameter upstream of the main cylinder. The total drag of the two cylinders was smaller than that of a single cylinder alone. Hot-wire measurements indicate significant changes to the downstream flow structure associated with the observed drag reduction. Our investigations indicate that different types of modification and excitation can yield different but useful outcomes.     

Environmental Fluid Catalytic Cracking Technology

The fluid catalytic cracking (FCC) process converts heavy oil into voluable fuel products and petrochemical feedstocks. Environmental regulations are a key driving force for reducing FCC process air-pollutant emissions and for changing the composition of fuel products. Environmental considerations are affecting the design and operation of the FCC and are providing opportunities for the development of in-process additives. The present article reviews developments in these environmental technologies.     

An EPROM-based PWM modulator for a three-phase soft commutatedinverter

A fully digital erasable programmable ROM (EPROM)-based pulse width modulator (PWM) that receives voltage and frequency control commands independently at the input and could be used in AC variable-speed drives is described. This modulator is simpler and dynamically better than one built using a microcomputer. A high-1 resolution (one in 256) is obtained, and up to eight different PWM switching strategies can be easily implemented. Changes in the voltage or frequency commands are transient free. Some experimental results are presented     

Analysis of a mobile-assisted adaptive location management strategy

Source messages intended for a mobile host can be routed in one of two ways. Either the source knows the direct route to the mobile host, and is informed of all location changes by the mobile host (informed routing), or the source directs messages to a home agent that forwards messages to the mobile host (triangle routing). When the rate at which the mobile host changes location and the rate at which messages are directed to the mobile host are known and fixed, we show that the optimal routing policy is described by a threshold rule that depends on the normalized differential cost of the routing techniques and the ratio of the source messaging to location update rates. Since thiscall to mobility ratio may not be knowna priori or may change slowly with time, we also derive an adaptive policy selection algorithm. The policy is derived from a maximum likelihood estimate of the call to mobility ratio based on observations of message arrivals and location changes. The algorithm is found to work well when there is a clear advantage to either triangle or informed routing. However, when the two routing schemes are relatively close in average cost, the algorithm performance is degraded by repeated policy reversals. For this reason, algorithms which use hysteresis and/or a preset preference (preference threshold) for one routing scheme or another were explored. It was found that neither hysteresis, nor preference threshold techniques alone performed well, but rather a combination of the two resulted in greatly improved performance for a wide range of values of the call to mobility ratio.     

Superscalar instruction execution in the 21164 Alpha microprocessor

The 21164 is a new quad-issue, superscalar Alpha microprocessor that executes 1.2 billion instructions per second. The 300-MHz, 0.5-μm CMOS chip delivers an estimated 345/505 SPECint32/SPECfp92 performance. The design's high clock rate, low operational latency, and high-throughput/nonblocking memory systems contribute to this performance     

Cultivation of Phanerochaete chrysosporium and production of lignin peroxidase in novel biofilm reactor systems: Hollow fiber reactor and silicone membrane reactor

The white rot fungus Phanerochaete chrysosporium and its extracellular enzyme lignin peroxidase are both known to catalyze the transformation and, in many cases, the degradation of several hazardous compounds and are, therefore, promising candidates for application in hazardous waste treatment. The application of P. chrysosporium in large-scale waste treatment and commercial production of lignin peroxidase has been impeded by the lack of bioreactor systems yielding consistent production of high levels of lignin peroxidase under long-term steady state conditions and controlled growth of the fungus. The use of innovative biofilm systems, which minimize intensive shear and provide for fungal growth as a biofilm, was investigated. The viability of the use of a hollow fiber reactor and a stirred tank reactor modified into a unique silicone membrane reactor for the cultivation of P. chrysosporium and production of high levels of lignin peroxidase was demonstrated. The membrane reactor utilizes silicone tubing as a growth support and for oxygenation. The silicone membrane reactor was operated using a repeated batch technique, consisting of alternating growth and production phases, to yield production of lignin peroxidase over a period of 5 weeks and appears promising for application as a hazardous waste treatment process.     

A 200-MHz 64-b dual-issue CMOS microprocessor

A 400-MIPS/200-MFLOPS (peak) custom 64-b VLSI CPU is described. The chip is fabricated in a 0.75-μm CMOS technology utilizing three levels of metalization and optimized for 3.3-V operation. The die size is 16.8 mm×13.9 mm and contains 1.68 M transistors. The chip includes separate 8-kbyte instruction and data caches and a fully pipelined floating-point unit (FPU) that can handle both IEEE and VAX standard floating-point data types. It is designed to execute two instructions per cycle among scoreboarded integer, floating-point, address, and branch execution units. Power dissipation is 30 W at 200-MHz operation     

Impact of Polarization Mode Dispersion in Multi-Hop and Multi-Rate WDM Rings

Fiber polarization mode dispersion (PMD) is perhaps the most critical transmission impairment in optical networks at transmission rates of 10 Gb/s and higher. Since the bandwidth-distance product, or transparency,of the optical circuit is limited by PMD, the overall network design and cost may be significantly altered by the actual fiber PMD values. The paper has three objectives. First, an accurate model for evaluating the PMD effects is presented and verified experimentally. Second, the cost increase of WDM rings due to PMD in a number of design scenarios—first generation, single-hop,multi-hop, and multi-rate networks—is assessed. Third, the polynomial-time algorithm proposed in Cerutti et al. [1] is modified to provide sub-optimal solutions for the above WDM rings, taking into account the limited bandwidth-distance product imposed by PMD. Presented results reveal that at high transmission rates, the cost of the multi-hop ring is less affected by PMD than the costs of first generation and single-hop rings.