Tri-Gate Bulk MOSFET Design for CMOS Scaling to the End of the Roadmap

A tri-gate bulk MOSFET design utilizing a low-aspect-ratio channel is proposed to provide an evolutionary pathway for CMOS scaling to the end of the roadmap. 3-D device simulations indicate that this design offers the advantages of a multi-gate FET (reduced variability in performance and improved scalability) together with the advantages of a conventional planar MOSFET (low substrate cost and capability for dynamic threshold-voltage control).     

Automating application software generation

Many approaches have been proposed to enhance software productivity and reliability. These approaches typically fall into three categories: the engineering approach, the formal approach and the knowledge-based approach. But the optimal gain in software productivity cannot be obtained if one relies on only one of these approaches. This paper describes the work in knowledge-based software engineering conducted by the authors for the past 10 years. The final goal of the research is to develop a paradigm for software engineering which integrates the three approaches mentioned above. A knowledge-based tool which can support the whole process of software development is provided in this paper.     

Sol-Gel Preparation of LaNiO3 and Its Physical and Chemical Properties

LaNiO3 was synthesized by sol-gel method in which lanthanum nitrate and nickel nitrate were used as start materials and citric acid was used as complex for gel formation.The precursor was dried and subsequently heated at elevated temperature to form the desired product.XRD analysis shows that pure LaNiO3 was synthesized.Electrical conductivity and electrochemical performance of the material were tested.The electrical conductivity decreases from 34.5that there are current peaks in the curve, which is the evidence of the electrochemical activity of LaNiO3.     

Residual stresses and transformation toughening in MoSi2 composites reinforced with partially stabilized zirconia

The results of study of the effects of yttria stabilization (0–6 mol.%) on the room-temperature fracture behavior and toughening mechanisms in zirconia-reinforced MoSi₂ are presented in this paper. Transformation toughening is shown to occur only in composites reinforced with zirconia particles stabilized with 2 mol.% yttria. However, the fracture toughness levels are comparable in the other composites with yttria levels between 0 and 6 mol.%. Toughening in the other composites is attributed to the combined effects of residual stress, microcrack shielding/anti-shielding and/or crack deflection. A rigorous micromechanics-based model is presented for the estimation of residual stress levels in brittle materials reinforced with phases that can transform during cooling or under stress. The model is applied successfully to the rationalization of the observed fracture and toughening phenomena.     

对洪水分级的浅见

洪水的等级划分应考虑流量、水位、防洪能力及灾害等因素,综合这些因素把洪水分成5个等级。1、2级洪水,洪水流量小,水位低,基本无灾;3级洪水,洪水流量较大或水位较高,有一定灾害;4级洪水,为大洪水或高水位,有较大灾害;5级洪水,为特大洪水或高水位,灾情严重。     

Measurement and modeling of the sidewall threshold voltage ofmesa-isolated SOI MOSFETs

Five-terminal silicon-on-insulator (SOI) MOSFETs have been characterized to determine the threshold voltage at the front, back, and sidewall as a function of the body bias. The threshold voltage shift with the body bias at the front and back interfaces can be explained by the standard bulk body effect equation. However, the threshold voltage shift at the sidewall is smaller than predicted by this equation and saturates at large body biases. This anomalous behavior is explained by two-dimensional charge sharing between the sidewall and the front and back interfaces. An analytical model that accounts for this charge sharing by a simple trapezoidal approximation of the depletion regions and correctly predicts the sidewall threshold voltage shift and its saturation is discussed. The model makes it possible to measure the sidewall threshold even when it is larger than the front threshold voltage     

60m高度处单片露天超高混凝土悬臂墙的设计与施工

通过采用竖向预应力技术 ,解决了 60m高度处单片 8m高悬臂钢筋混凝土墙根部裂缝宽度超过规范限值的问题 ;采用将预应力钢绞线顶端锚固于墙高中段等结构和施工措施 ,控制墙体长细比不超过 3 0 ,减少了由于长细比过大对墙体承载力的不利影响     

Modeling Power Supply Noise in Delay Testing

Excessive power supply noise during test can cause overkill. This article discusses two models for supply noise in delay testing and their application to test compaction. The proposed noise models avoid complicated power network analysis, making them much faster than existing power noise analysis tools. can cause performance degradation and     

Quantifying Organization by Means of Entropy

With the aim to reduce disorder and improve efficiency, nodes in an ad hoc network run a self-organization scheme to cooperatively organize the network. Although metrics such as complexity or self-stability are commonly used for evaluation, to the best of our knowledge, none of them quantifies the efficiency to build and maintain an organization (order). We henceforth apply the notion of entropy to ad hoc type wireless networks facilitating a quantification of the internal organizational state generated by different self-organization schemes. Invoking node and link failure probabilities, we expose the dependency of the organizational state on the self-organization protocol of choice.     

Hydrogenated amorphous silicon thin-film transistor arrays fabricated by digital lithography

A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 /spl times/ 64 pixel (300 /spl mu/m pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5 V, carrier mobility of 0.7 cm/sup 2//V/spl middot/s, subthreshold slope of 0.76 V/decade, and an on/off ratio of 10/sup 8/.