An EKV-based high voltage MOSFET model with improved mobility and drift model

An EKV-based high voltage MOSFET model is presented. The intrinsic channel model is derived based on the charge based EKV-formalism. An improved mobility model is used for the modeling of the intrinsic channel to improve the DC characteristics. The model uses second order dependence on the gate bias and an extra parameter for the smoothening of the saturation voltage of the intrinsic drain. An improved drift model [Chauhan YS, Anghel C, Krummenacher F, Ionescu AM, Declercq M, Gillon R, et al. A highly scalable high voltage MOSFET model. In: IEEE European solid-state device research conference (ESSDERC), September 2006. p. 270–3; Chauhan YS, Anghel C, Krummenacher F, Maier C, Gillon R, Bakeroot B, et al. Scalable general high voltage MOSFET model including quasi-saturation and self-heating effect. Solid State Electron 2006;50(11–12):1801–13] is used for the modeling of the drift region, which gives smoother transition on output characteristics and also models well the quasi-saturation region of high voltage MOSFETs. First, the model is validated on the numerical device simulation of the VDMOS transistor and then, on the measured characteristics of the SOI-LDMOS transistor. The accuracy of the model is better than our previous model [Chauhan YS, Anghel C, Krummenacher F, Maier C, Gillon R, Bakeroot B, et al. Scalable general high voltage MOSFET model including quasi-saturation and self-heating effect. Solid State Electron 2006;50(11–12):1801–13] especially in the quasi-saturation region of output characteristics.     

Generating optimal adaptive fuzzy-neural models of dynamicalsystems with applications to control

The paper describes an approach to generating optimal adaptive fuzzy neural models from I/O data. This approach combines structure and parameter identification of Takagi-Sugeno-Kang (TSK) fuzzy models. We propose to achieve structure determination via a combination of modified mountain clustering (MMC) algorithm, recursive least squares estimation (RLSE), and group method of data handling (GMDH). Parameter adjustment is achieved by training the initial TSK model using the algorithm of an adaptive network based fuzzy inference system (ANFIS), which employs backpropagation (BP) and RLSE. Further, a procedure for generating locally optimal model structures is suggested. The structure optimization procedure is composed of two phases: 1) locally optimal rule premise variables subsets (LOPVS) are identified using MMC, GMDH, and a search tree (ST); and 2) locally optimal numbers of model rules (LONOR) are determined using MMC/RLSE along with parallel simulation mean square error (PSMSE) as a performance index. The effectiveness of the proposed approach is verified by a variety of simulation examples. The examples include modeling of a nonlinear dynamical process from I/O data and modeling nonlinear components of dynamical plants, followed by tracking control based on a model reference adaptive scheme (MRAC). Simulation results show that this approach is fast and accurate and leads to several optimal models     

Sub-quarter micron silicon integrated circuits and single wafer processing

This paper describes the role of single wafer processing in the development of sub-quarter micron silicon integrated circuits (ICs). The issues related to device processing, choice of materials, performance, reliability, and manufacturing are covered. Single wafer processing based rapid photothermal processing (dominant photons with wavelength less than about 800 nm) is an ideal answer to almost all the thermal processing requirements of current and future Si ICs. For process integration, a new model for process optimization based on minimization of thermal stress is proposed. For breaking the sub-100 nm manufacturing barriers, high throughput lithography based on direct writing is a proposed solution.     

A novel technique for RTP annealing of compound semiconductors

We introduce for the first time a novel rapid thermal processing (RTP) unit called Zapper™, which has recently been developed by MHI Inc. and the University of Florida, for high temperature thermal processing of semiconductors. This Zapper™ unit is capable of reaching much highertemperatures (>1500°C) than conventional tungsten–halogen lamp RTP equipment and achievinghigh ramp-up and ramp-down rates. We have conducted implant activation annealing studies ofSi⁺-implanted GaN thin films (with and without an AlN encapsulation layer) using the Zapper™ unit at temperatures up to 1500°C. The electrical property measurements of such annealed samples have led to the conclusion that high annealing temperatures and AlN encapsulation are needed for the optimum activation efficiency of Si⁺ implants in GaN. It has clearly been demonstrated that the Zapper™ unit has tremendous potential for RTP annealing of semiconductor materials, especially for wide band-gap (WBG) compound semiconductors that require very high processing temperatures.     

Transient plasma shielding effects during pulsed laser ablation of materials

The absorption of laser energy by the plasma during pulsed laser deposition of thin films has been analyzed theoretically. The amount of laser energy absorbed in the plasma termed as the “plasma shielding factor” is a function of the incident laser wavelength, and time dependent plasma dimensions and electron density. Due to time varying parameters, a quantitative analysis of the plasma absorption is difficult. A model which takes into account the absorption of laser energy by the plasma has been developed. In this model, the time-dependent plasma dimension is replaced by the time dependent ablation depth. Using simulated absorption coefficient values, the ablation characteristics of silicon and high T_c superconductors are computed and compared with experimental results. The plasma shielding factor was found to vary approximately linearly with absorbed laser energy. The calculations also showed that the plasma shielding was strongly dependent on the laser fluence but varies very weakly with the simulated plasma absorption coefficient values. Experimental results on plume shielding showed good agreement with the calculations.     

Low thermal budget processing of organic dielectrics

Low dielectric constant organic materials are ideal for use as interconnect dielectrics for integrated circuits (ICs) to reduce power dissipation, crosstalk and RC delays. For high performance and reliability of ICs, reduced thermal and intrinsic stress is highly desirable. Low thermal budget rapid isothermal processing (RIP) can provide materials with lower stress. In this paper, we demonstrate the role of photoeffects in the curing of polyimide films using a rapid isothermal processor as a source of optical and thermal energy. The availability of large a number of ultraviolet and vacuum ultraviolet photons on the film surface allowed a lower curing temperature and also resulted in the lowest leakage current and film stress. We demonstrate a direct one-to-one correlation between electrical, mechanical, and structural properties of the organic dielectrics     

Effect of humidity on structure and electrochromic properties of sol–gel-derived tungsten oxide films

The influence of varying relative humidity (RH55 and 75%) during thin film deposition from an oxalato-acetylated peroxotungstic acid sol by dip coating, on the microstructure and electrochromic properties of pristine tungsten oxide (WO₃) films obtained upon annealing is presented. The films fabricated under a relative humidity of 55% are amorphous whereas the ones cast under a substantially humid atmosphere (RH75%) are characterized by interconnected nanocrystallites with a triclinic phase and a nanoporous surface morphology as well. Upon lithium insertion, larger integrated values of transmission modulation and coloration efficiency are observed over the photopic and solar regions, for the films prepared under a RH75% as compared to that observed for the films deposited under a RH of 55%. Functional improvements are due to the larger surface area of nanocrystallites and a porous microstructure, a consequence of a higher degree of hydration and hydroxylation in the former films in contrast to the non-porous and a rather featureless structure of the latter films. Faster switching kinetics between the clear and blue states, a greater current density for lithium intercalation, a higher diffusion coefficient for lithium and a superior cycling stability, again shown by the film fabricated under a 75% RH confirm that the WO₃ film microstructure is most conducive for a more facile ion insertion–extraction process, which hints at its potential for electrochromic window applications.     

Adaptive Filtering Techniques using Cyclic Prefix in OFDM Systems for Multipath Fading Channel Prediction

This paper presents adaptive channel prediction techniques for wireless orthogonal frequency division multiplexing (OFDM) systems using cyclic prefix (CP). The CP not only combats intersymbol interference, but also precludes requirement of additional training symbols. The proposed adaptive algorithms exploit the channel state information contained in CP of received OFDM symbol, under the time-invariant and time-variant wireless multipath Rayleigh fading channels. For channel prediction, the convergence and tracking characteristics of conventional recursive least squares (RLS) algorithm, numeric variable forgetting factor RLS (NVFF-RLS) algorithm, Kalman filtering (KF) algorithm and reduced Kalman least mean squares (RK-LMS) algorithm are compared. The simulation results are presented to demonstrate that KF algorithm is the best available technique as compared to RK-LMS, RLS and NVFF-RLS algorithms by providing low mean square channel prediction error. But RK-LMS and NVFF-RLS algorithms exhibit lower computational complexity than KF algorithm. Under typical conditions, the tracking performance of RK-LMS is comparable to RLS algorithm. However, RK-LMS algorithm fails to perform well in convergence mode. For time-variant multipath fading channel prediction, the presented NVFF-RLS algorithm supersedes RLS algorithm in the channel tracking mode under moderately high fade rate conditions. However, under appropriate parameter setting in \(2\times 1\) space–time block-coded OFDM system, NVFF-RLS algorithm bestows enhanced channel tracking performance than RLS algorithm under static as well as dynamic environment, which leads to significant reduction in symbol error rate.     

An analytical geometric range free localization scheme based on mobile beacon points in wireless sensor network

In many applications of wireless sensor network, the position of the sensor node is useful to identify the actuating response of the environment. The main idea of the proposed localization scheme is similar with most of the existing localization schemes, where a mobile beacon with global positioning system broadcast its current location coordinate periodically. The received information of the coordinates help other unknown nodes to localize themselves. In this paper, we proposed a localization scheme using mobile beacon points based on analytical geometry. Sensor node initially choose two distant beacon points, in-order to minimize its residence area. Later using the residence area, sensor node approximate the radius and half length of the chord with reference to one of the distant beacon point. Then the radius and half length of the chord are used to estimate the sagitta of an arc. Later, sensor node estimate its position using radius, half length of the chord, and sagitta of an arc. Simulation result shows the performance evaluation of our proposed scheme on various trajectories of mobile beacon such as CIRCLE, SPIRAL, S-CURVE, and HILBERT.     

Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF（2^m）

An error tolerant hardware efficient verylarge scale integration （VLSI） architecture for bitparallel systolic multiplication over dual base, which canbe pipelined, is presented. Since this architecture has thefeatures of regularity, modularity and unidirectionaldata flow, this structure is well suited to VLSIimplementations. The length of the largest delay pathand area of this architecture are less compared to the bitparallel systolic multiplication architectures reportedearlier. The architecture is implemented using Austria Micro System＇s 0.35 μm CMOS （complementary metaloxide semiconductor） technology. This architecture canalso operate over both the dual-base and polynomialbase.