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51.
In sub-100-nm generation, gate-tunneling leakage current increases and dominates the total standby leakage current of LSIs based on decreasing gate-oxide thickness. Showing that the gate leakage current is effectively reduced by lowering the gate voltage, we propose a local dc level control (LDLC) for SRAM cell arrays and an automatic gate leakage suppression driver (AGLSD) for peripheral circuits. We designed and fabricated a 32-kB 1-port SRAM using 90-nm CMOS technology. The six-transistor SRAM cell size is 1.25 /spl mu/m/sup 2/. Evaluation shows that the standby current of 32-kB SRAM is 1.2 /spl mu/A at 1.2 V and room temperature. It is reduced to 7.5% of conventional SRAM.  相似文献   
52.
We propose a novel vertical-cavity surface emitting laser (VCSEL) with Al(Ga)As multi-oxide layer (MOX) structure for the purpose of enlarging window aperture maintaining single transverse mode operation. We have fabricated an InGaAs-GaAs VCSEL with the proposed MOX structure formed on GaAs (311)B substrate. We have performed a numerical simulation to investigate single-mode behavior of the proposed structure and showed a possibility of single-mode VCSEL's with a large active area. We have fabricated an 11-μm current aperture 960-nm wavelength VCSEL with this MOX structure. The threshold current and voltage were 1.0 mA and 2.0 V, respectively, which are comparable to those of conventional oxide VCSELs. In 8-μm aperture, single-mode operation was maintained with a driving current up to four times the threshold  相似文献   
53.
In all-optical gate switches that employ the cascaded second-order nonlinear effect in quasi-phase-matched (QPM) LiNbO/sub 3/ devices, walkoff between the fundamental and second harmonic pulses is very large. The authors experimentally show that crosstalk of the switch induced by such walkoff limits the switching speed, but that the switching speed can significantly be enhanced by walkoff compensation. Using a 20-mm-long QPM LiNbO/sub 3/ waveguide device, the authors switch one of twin pulses separated by 6.25 ps without crosstalk, showing the possibility of switching a 160-Gb/s signal.  相似文献   
54.
A flat wall-like thermoelectric generation system is developed for applications in exhaust heat of kilns. The design of the whole experimental setup is presented. The essential performance of the thermoelectric generation system is tested, including open-circuit voltage, output power, and system conversion efficiency. The results illustrate that, when heat source insulation is not considered, the system conversion is efficient at hot-side temperatures between 120°C and 150°C. In addition, the nonuniformity of heat transfer is found to significantly affect the power-generating ability of the system. System-level simulation is carried out using a quasi-one-dimensional numerical model that enables direct comparison with experimental results. The results of both experiment and simulation will provide a foundation to improve and optimize complex thermoelectric generation systems.  相似文献   
55.
We have developed a capacitive fingerprint sensor chip using low-temperature poly-Si thin film transistors (TFTs). We have obtained good fingerprint images which have sufficient contrast for fingerprint certification. The sensor chip comprises sensor circuits, drive circuits, and a signal processing circuit. The new sensor cell employs only one transistor and one sensor plate within one cell. There is no leakage current to other cells by using a new and unique sensing method. The output of this sensor chip is an analog wave and the designed maximum output level is almost equal to the TFT's threshold voltage, which is 2-3 V for low-temperature poly-Si TFTs. We used a glass substrate and only two metal layers to lower the cost. The size of the trial chip is 30 mm/spl times/20 mm/spl times/1.2 mm and the sensor area is 19.2 mm/spl times/15 mm. The size of the prototype cell is now 60 /spl mu/m/spl times/60 /spl mu/m at 423 dpi, but it will be easy to increase the resolution up to more than 500 dpi. The drive frequency is now 500 kHz and the power consumption is 1.2 mW with a 5-V supply voltage. This new fingerprint sensor is most suitable for mobile use because the sensor chip is low cost and in a thin package with low power consumption.  相似文献   
56.
The growth characteristics of thick (100) CdTe epitaxial layers of a thickness up to 200 μm on a (100) GaAs substrate in a metal-organic vapor-phase epitaxy (MOVPE) system and fabrication of CdTe/n+-GaAs heterojunction diodes for their possible applications in low-energy x-ray imaging detectors are reported. The grown epilayers were of high structural quality as revealed from the x-ray double-crystal rocking curve (DCRC) analysis, where the full-width at half-maximum (FWHM) values of the (400) diffraction peaks was between 50 arcsec and 70 arcsec. The 4.2-K photoluminescence (PL) showed high-intensity bound-excitonic emission and very small defect-related peaks. The heterojunction diode fabricated had a good rectification property with a low value of reverse-bias current. The x-ray detection capability of the diode was examined by the time-of-flight (TOF) measurement, where good bias-dependent photoresponse was observed, but no carrier transport property could be deduced. It was found that the CdTe layer has a large number of trapping states as attributed to the cadmium-related vacancy and Ga-impurity, diffused from the substrate, related defect complexes.  相似文献   
57.
A new segment quantization method using the Lempel-Ziv algorithm is proposed, and it is applied to quantize line spectral frequency parameters in speech codec. The proposed segment quantizer can save four bits per frame, compared with the ITU-T G.729 speech codec (18 bits/frame), without degradation of subjective or objective speech quality  相似文献   
58.
A numerical design method for wavelength division multiplexing (WDM) transmission systems employing distributed Raman amplification (DRA) is proposed. This method evaluates fiber nonlinear effects by considering the equivalent fiber loss with DRA. The method is used to evaluate the performance of WDM transmission systems in which DRA is employed in a 1.55-μm dispersion-shifted fiber (DSF) transmission line. Transmission limit and the optimum fiber input powers for 1550-nm band (C-band) and 1580-nm band (L-band) transmission are investigated. Results show that bidirectional pumping is the best approach to extending transmission distance. Furthermore, the transport limits of optical transport networks that use DRA and optical add/drop multiplexers are analyzed  相似文献   
59.
We have developed the advanced performance, small-scale InGaP/GaAs heterojunction bipolar transistors (HBTs) by using WSi/Ti base electrode and buried SiO2 in the extrinsic collector. The base-collector capacitance CBC was further reduced to improve high-frequency performance. Improving the uniformity of the buried SiO 2, reducing the area of the base electrode, and optimizing the width of the base-contact enabled us to reduce the parasitic capacitance in the buried SiO2 region by 50% compared to our previous devices. The cutoff frequency fT of 156 GHz and the maximum oscillation frequency fmax of 255 GHz were obtained at a collector current IC of 3.5 mA for the HBT with an emitter size SE of 0.5×4.5 μm2, and fT of 114 GHz and fmax of 230 GHz were obtained at IC of 0.9 mA for the HBT with SE of 0.25×1.5 μm2. We have also fabricated digital and analog circuits using these HBTs. A 1/8 static frequency divider operated at a maximum toggle frequency of 39.5 GHz with a power consumption per flip-flop of 190 mW. A transimpedance amplifier provides a gain of 46.5 dB·Ω with a bandwidth of 41.6 GHz at a power consumption of 150 mW. These results indicate the great potential of our HBTs for high-speed, low-power circuit applications  相似文献   
60.
The forward and reverse current density-voltage (J-V) and capacitance-voltage (C-V) characteristics of pentacene/n-silicon heterojunction diodes were investigated to clarify the carrier conduction mechanism at the organic/inorganic heterojunction. Current rectification characteristics of the pentacene/n-Si junctions can be explained by a Schottky diode model with an interfacial layer. The diode parameters such as Schottky barrier height and ideality factor were estimated to be 0.79-1.0 eV and 2.4-2.7, respectively. The C-V analysis suggests that the depletion layer appears selectively in the n-Si layer with a thickness of 1.47 μm from the junction with zero bias and the diffusion potential was estimated at 0.30 eV at the open-circuit condition. The present heterojunction allows the photovoltaic operation with power conversion efficiencies up to 0.044% with a simulated solar light exposure of 100 mW/cm2.  相似文献   
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