Opportunistic Space-Division Multiple Access With Beam Selection

In this paper, a novel transmission technique for the multiple-input multiple-output (MIMO) broadcast channel is proposed that allows simultaneous transmission to multiple users with limited feedback from each user. During a training phase, the base station modulates a training sequence on multiple sets of randomly chosen orthogonal beamforming vectors. Each user sends the index of the best beamforming vector and the corresponding signal-to-interference-plus-noise ratio for that set of orthogonal vectors back to the base station. The base station opportunistically determines the users and corresponding orthogonal vectors that maximize the sum capacity. Based on the capacity expressions, the optimal amount of training to maximize the sum capacity is derived as a function of the system parameters. The main advantage of the proposed system is that it provides throughput gains for the MIMO broadcast channel with a small feedback overhead, and provides these gains even with a small number of active users. Numerical simulations show that a 20% gain in sum capacity is achieved (for a small number of users) over conventional opportunistic space division multiple access, and a 100% gain (for a large number of users) over conventional opportunistic beamforming when the number of transmit antennas is four.     

CMOS Outphasing Class-D Amplifier With Chireix Combiner

This letter presents a CMOS outphasing class-D power amplifier (PA) with a Chireix combiner. Two voltage-mode class-D amplifiers used in the outphasing system were designed and implemented with a 0.18-mum CMOS process. By applying the Chireix combiner technique, drain efficiency of the outphasing PA for CDMA signals was improved from 38.6% to 48% while output power was increased from 14.5 to 15.4 dBm with an adjacent channel power ratio of -45 dBc.     

Implementation and characterization of flash-based hardware security primitives for cryptographic key generation

Hardware security primitives, also known as physical unclonable functions (PUFs), perform innovative roles to extract the randomness unique to specific hardware. This paper proposes a novel hardware security primitive using a commercial off-the-shelf flash memory chip that is an intrinsic part of most commercial Internet of Things (IoT) devices. First, we define a hardware security source model to describe a hardware-based fixed random bit generator for use in security applications, such as cryptographic key generation. Then, we propose a hardware security primitive with flash memory by exploiting the variability of tunneling electrons in the floating gate. In accordance with the requirements for robustness against the environment, timing variations, and random errors, we developed an adaptive extraction algorithm for the flash PUF. Experimental results show that the proposed flash PUF successfully generates a fixed random response, where the uniqueness is 49.1%, steadiness is 3.8%, uniformity is 50.2%, and min-entropy per bit is 0.87. Thus, our approach can be applied to security applications with reliability and satisfy high-entropy requirements, such as cryptographic key generation for IoT devices.     

Optoelectronic and microwave transmission characteristics of indium solder bumps for low-temperature flip-chip applications

This paper describes low-temperature flip-chip bonding for both optical interconnect and microwave applications. Vertical-cavity surface-emitting laser (VCSEL) arrays were flip-chip bonded onto a fused silica substrate to investigate the optoelectronic characteristics. To achieve low-temperature flip-chip bonding, indium solder bumps were used, which had a low melting temperature of 156.7/spl deg/C. The current-voltage (I-V) and light-current (L-I) characteristics of the flip-chip bonded VCSEL arrays were improved by Ag coating on the indium bump. The I-V and L-I curves indicate that optical and electrical performances of Ag-coated indium bumps are superior to those of uncoated indium solder bumps. The microwave characteristics of the solder bumps were investigated by using a flip-chip-bonded coplanar waveguide (CPW) structure and by measuring the scattering parameter with an on-wafer probe station for the frequency range up to 40 GHz. The indium solder bumps, either with or without the Ag coating, provided good microwave characteristics and retained the original characteristic of the CPW signal lines without degradation of the insertion and return losses by the solder bumps.     

Systematic Study of Widely Applicable N‐Doping Strategy for High‐Performance Solution‐Processed Field‐Effect Transistors

A specific design for solution‐processed doping of active semiconducting materials would be a powerful strategy in order to improve device performance in flexible and/or printed electronics. Tetrabutylammonium fluoride and tetrabutylammonium hydroxide contain Lewis base anions, F^? and OH^?, respectively, which are considered as organic dopants for efficient and cost‐effective n‐doping processes both in n‐type organic and nanocarbon‐based semiconductors, such as poly[[N,N′‐bis(2‐octyldodecyl)‐naphthalene‐1,4,5,8‐bis(dicarboximide)‐2,6‐diyl]‐alt‐5,5′‐(2,2′‐bithiophene)] (P(NDI2OD‐T2)) and selectively dispersed semiconducting single‐walled carbon nanotubes by π‐conjugated polymers. The dramatic enhancement of electron transport properties in field‐effect transistors is confirmed by the effective electron transfer from the dopants to the semiconductors as well as controllable onset and threshold voltages, convertible charge‐transport polarity, and simultaneously showing excellent device stabilities under ambient air and bias stress conditions. This simple solution‐processed chemical doping approach could facilitate the understanding of both intrinsic and extrinsic charge transport characteristics in organic semiconductors and nanocarbon‐based materials, and is thus widely applicable for developing high‐performance organic and printed electronics and optoelectronics devices.     

Multiple Virtual Interfaces for Multi-homing Hosts to Support Inter-technology Handover in PMIPv6 Network

Proxy Mobile IPv6 (PMIPv6), a network-based mobility management protocol, supports multi-homing, inter-technology handover, and flow mobility, with the help of a host’s virtual interface (VI). Several single virtual interface (SVI) schemes have been proposed to support these functions. In the SVI schemes, the link-layer identifier (LL-ID) should be swapped while the host is processing neighbor discovery (ND) after inter-technology handover or flow mobility. That is, a host must replace the LL-ID of a VI contained in a neighbor advertisement with the LL-ID of a physical interface (PI) related to a real connection. Such LL-ID swapping cannot be executed under secure neighbor discovery, and it causes ND processing delay and high overhead to check all outgoing packets. In this paper, we propose a multiple virtual interfaces scheme to solve the problem related to the LL-ID swapping, and to provide good support to the inter-technology handover. In the proposed scheme, there are the same numbers of VIs as the PIs between the data link layer and the network layer of a host. Since each VI maintains its own neighbor cache, the proposed scheme does not require LL-ID swapping, so that it can keep the standard ND process. We explain the basic operation of PMIPv6 inter-technology handover under the proposed scheme and, through NS-3 simulation, evaluate the performance of the proposed scheme in terms of ND process delay and inter-technology handover latency.     

A dead-time minimization algorithm for improving the output characteristics of the PWM inverter

The dead time in an inverter is necessary to prevent the short circuit of the DC source. However, the dead time may cause serious problems such as waveform distortion, voltage drop, increased torque ripple and heating of the motors. In this paper, a dead-time minimization algorithm is proposed for improving the inverter output performance. The adverse effects of the dead time are investigated, focusing on the voltage drop and the distortion factor of inverter output current. The proposed algorithm consists of forbidding unnecessary triggers for the inverter switches that are not turned on although the gate drive signal is impressed. The proposed algorithm is explained in terms of the conduction modes of the output currents. The validity of the proposed method is verified by comparing the simulated and experimental results with those of the conventional methods. It is concluded from the results that the proposed algorithm can reduce the output current harmonics. Further, the output voltage can be equal to the reference value and the number of inverter switchings can also be reduced to 50% compared with those of conventional methods.     

Adaptive modulation and coding for Long Term Evolution‐based mobile satellite communication system

The adaptive modulation and coding (AMC) scheme is mandatory for modern wireless communication systems to overcome inevitable channel impairments. Many of the limitations using AMC are due to the long round‐trip delay of a satellite system. This paper proposes an efficient AMC scheme with power control and symbol interleaving that can be effectively applied to satellite systems. In particular, we focus on mobile satellite systems that have maximum compatibility in a Long Term Evolution system. Simulations reveal that the proposed scheme can provide a maximum 10.2% increase of average beam spectral efficiency and a maximum of 8‐dB power gain compared with a conventional AMC scheme. Copyright © 2012 John Wiley & Sons, Ltd.     

High-speed driving method using bipolar scan waveform in AC plasma display panel

This paper proposes a new high-speed driving method using the bipolar scan waveform with a scan width of 1 /spl mu/s in an ac-plasma display panel. The bipolar scan waveform in an address period consists of a two-step pulse with two different polarities, i.e., a forward scan pulse with a negative polarity and reverse scan pulse with a positive polarity, which can produce two address discharges, including a primary address discharge for generating wall charges and secondary address discharge for accumulating wall charges. To produce the fast address discharge stably using the bipolar scan pulse during an address period, a new reset waveform is designed based on a V/sub t/ close curve analysis, and the address discharge characteristics examined under various reset and address waveforms. As a result of adopting the proposed driving method, a high-speed address with a scan width of 1 /spl mu/s is successfully obtained when using a checkered pattern on a 4-in test panel.