GB4706系列标准释义通用要求部分——定义

(续接本刊第9期第31页)标准原文3定义[释义]1本标准定义了标准中涉及到的67个术语,较旧版标准增加了7个定义。这些定义归纳为九大类,它们分别是:①与额定值有关的(3.1.1-3.1.8、3.1.10),共9个定义。②与电源连接有关的(3.2.1-3.2.7),共7个定义。③与绝缘及电气安全防护有关的(3     

黄化供电局电力载波机4W E＆M接口改造及应用

介绍黄化供电局电力载波机的接口改造及应用，实现用4W E＆M方式接入程控交换机、扩频复接器的一种组网模式。其特点是交换机侧、扩频复接器侧的一端载波机取消自动盘而改造4W E＆M接口，对端保留自动盘。载波机的接口改造对相关人员具有一定的推广和应用价值。     

基于CC—LINK的FBT真空灌封系统

本文主要研究了三菱CC—LINK总线在回扫变压器（FBT）真空灌封控制系统的应用。针对回扫变压器（FBT）灌装的生产特点，工艺要求和现有的PLC控制系统，介绍了控制系统的构成及其实现方法。同时讨论了CC-LINK总线控制系统的网络优势、配置及拓扑结构。     

热连轧中AGC控制系统的研究与应用

本文重点介绍莱钢1500mm热连轧机中液压AGC的控制性能及其实现方式。     

一种基于FPGA&DSP的电子式互感器数字接口实现方案

为了实现电子式互感器与保护、测控设备装置之间的数字接口,介绍了电子式互感器数字接口的重要组成部分,即合并单元的功能,根据其特点提出了一种基于FPGA和DSP平台的电子式互感器数字接口实现方案.利用FPGA与DSP相互配合完成合并单元同步,多路数据接收和处理,以及以太网通讯功能,满足了电子式互感器数字接口高速、可靠的要求,有望应用于实际系统中.     

一种新型移相全桥ZVZCS PWM变换器拓扑

实现了一种新的带双变压器结构的零电压零电流移相全桥PWM控制变换器。详细分析了该变换器的工作时序和工作状态,给出了各个状态的等效电路。在这个拓扑结构基础上,调试出一台工作功率840W,开关频率为100kHz的样机,同时列出实验波形以及效率曲线进一步验证了这一电路的优势。     

On the minimum pseudo-codewords of LDPC codes

In this letter, we study the minimum pseudo-codewords of low-density parity-check (LDPC) codes under linear programming (LP) decoding. We show that a lower bound of Chaichanavong and Siegel on the pseudo-weight of a pseudo-codeword is tight if and only if this pseudo-codeword is a real multiple of a codeword. Using this result we further show that for some LDPC codes, e.g., Euclidean plane and projective plane LDPC codes, there are no other minimum pseudo-codewords except the real multiples of minimum codewords.     

On the stopping distance of finite geometry LDPC codes

In this letter, the stopping sets and stopping distance of finite geometry LDPC (FG-LDPC) codes are studied. It is known that FG-LDPC codes are majority-logic decodable and a lower bound on the minimum distance can be thus obtained. It is shown in this letter that this lower bound on the minimum distance of FG-LDPC codes is also a lower bound on the stopping distance of FG-LDPC codes, which implies that FG-LDPC codes have considerably large stopping distance. This may explain in one respect why some FG-LDPC codes perform well with iterative decoding in spite of having many cycles of length 4 in their Tanner graphs.     

Shift-full-rank matrices and applications in space-time trellis codes for relay networks with asynchronous cooperative diversity

To achieve full cooperative diversity in a relay network, most of the existing space-time coding schemes require the synchronization between terminals. A family of space-time trellis codes that achieve full cooperative diversity order without the assumption of synchronization has been recently proposed. The family is based on the stack construction by Hammons and El Gamal and its generalizations by Lu and Kumar. It has been shown that the construction of such a family is equivalent to the construction of binary matrices that have full row rank no matter how their rows are shifted, where a row corresponds to a terminal (or transmit antenna) and its length corresponds to the memory size of the trellis code on that terminal. We call such matrices as shift-full-rank (SFR) matrices. A family of SFR matrices has been also constructed, but the memory sizes of the corresponding space-time trellis codes (the number of columns of SFR matrices) grow exponentially in terms of the number of terminals (the number of rows of SFR matrices), which may cause a high decoding complexity when the number of terminals is not small. In this paper, we systematically study and construct SFR matrices of any sizes for any number of terminals. Furthermore, we construct shortest (square) SFR (SSFR) matrices that correspond to space-time trellis codes with the smallest memory sizes and asynchronous full cooperative diversity. We also present some simulation results to illustrate the performances of the space-time trellis codes associated with SFR matrices in asynchronous cooperative communications.