A novel frequency-offset monitoring technique for direct-detection DPSK systems

We propose and demonstrate a novel technique to monitor the frequency offset between the optical source and delay interferometer (DI) for direct-detection differential phase-shift-keying (DPSK) systems. In this scheme, a phase-modulated tone is applied to DPSK signals at the transmitter and then detected after being converted into an amplitude-modulated tone at the DI to be used for the monitoring signal. Our experimental demonstration shows that the monitoring range and sensitivity of the proposed scheme are measured to be /spl plusmn/2 GHz and /spl sim/10 MHz, respectively, which we believe are good enough to be used either to generate alarm signals for the frequency offset monitoring or to control the feedback loop of the DI.     

Voltages induced on an overhead wire by lightning strikes to a nearby tall grounded object

The aim of this study was to identify conditions under which the presence of tall strike object can serve to increase or decrease lightning-induced voltages on a nearby overhead wire. We examined the ratios of magnitudes of lightning-induced voltages on the overhead wire for the cases of strikes to a tall object and to flat ground as a function of distance from the lightning channel d, current reflection coefficients at the top of the strike object /spl rho//sub top/ and at the bottom of the strike object /spl rho//sub bot/, the current reflection coefficient at the channel base (in the case of strikes to flat ground) /spl rho//sub gr/, and the return stroke speed v. Lightning-induced voltages were computed using the finite-difference time-domain (FDTD) method. The transmission line (TL) model was used to find the distribution of current along the lightning channel and the strike object. The ratio of magnitudes of lightning-induced voltages for tall-object and flat-ground cases increases with increasing d (ranging from 40--200 m), decreasing /spl rho//sub bot/(<1), decreasing /spl rho//sub top/ (<0, except for the case of /spl rho//sub bot/=0), and decreasing v (相似文献   

Gossip-based ad hoc routing

Many ad hoc routing protocols are based on some variant of flooding. Despite various optimizations of flooding, many routing messages are propagated unnecessarily. We propose a gossiping-based approach, where each node forwards a message with some probability, to reduce the overhead of the routing protocols. Gossiping exhibits bimodal behavior in sufficiently large networks: in some executions, the gossip dies out quickly and hardly any node gets the message; in the remaining executions, a substantial fraction of the nodes gets the message. The fraction of executions in which most nodes get the message depends on the gossiping probability and the topology of the network. In the networks we have considered, using gossiping probability between 0.6 and 0.8 suffices to ensure that almost every node gets the message in almost every execution. For large networks, this simple gossiping protocol uses up to 35% fewer messages than flooding, with improved performance. Gossiping can also be combined with various optimizations of flooding to yield further benefits. Simulations show that adding gossiping to AODV results in significant performance improvement, even in networks as small as 150 nodes. Our results suggest that the improvement should be even more significant in larger networks.     

Simultaneous all-optical inverted and noninverted wavelength conversion using a single-stage fiber-optical parametric amplifier

We have demonstrated, for the first time to our knowledge, simultaneous all-optical inverted and noninverted wavelength conversion by using a single-stage two-pump fiber-optical parametric amplifier with an extinction ratio between 7 and 14 dB over 24 nm.     

Shift-full-rank matrices and applications in space-time trellis codes for relay networks with asynchronous cooperative diversity

To achieve full cooperative diversity in a relay network, most of the existing space-time coding schemes require the synchronization between terminals. A family of space-time trellis codes that achieve full cooperative diversity order without the assumption of synchronization has been recently proposed. The family is based on the stack construction by Hammons and El Gamal and its generalizations by Lu and Kumar. It has been shown that the construction of such a family is equivalent to the construction of binary matrices that have full row rank no matter how their rows are shifted, where a row corresponds to a terminal (or transmit antenna) and its length corresponds to the memory size of the trellis code on that terminal. We call such matrices as shift-full-rank (SFR) matrices. A family of SFR matrices has been also constructed, but the memory sizes of the corresponding space-time trellis codes (the number of columns of SFR matrices) grow exponentially in terms of the number of terminals (the number of rows of SFR matrices), which may cause a high decoding complexity when the number of terminals is not small. In this paper, we systematically study and construct SFR matrices of any sizes for any number of terminals. Furthermore, we construct shortest (square) SFR (SSFR) matrices that correspond to space-time trellis codes with the smallest memory sizes and asynchronous full cooperative diversity. We also present some simulation results to illustrate the performances of the space-time trellis codes associated with SFR matrices in asynchronous cooperative communications.     

A Study on the Pd/a-Si/Ni Seed Layer for Metal-Induced Lateral Crystallization and Poly-Si TFTs

The effect of Pd on the growth rate of metal-induced lateral crystallization (MILC) from Ni seed and the electrical properties of thin-film transistors (TFTs) fabricated on the films crystallized by MILC were investigated. When the Pd metal is placed on the amorphous-silicon/Ni-seed layer, the MILC growth rate is two to three times faster than that of conventional Ni-MILC, without any degradation of TFTs. These results were explained by a stress that is generated by the formation of Pd₂Si     

Modeling and simulation for a drop-impact analysis of multi-layered printed circuit boards

Multi-layered printed circuit boards (PCBs) contain a multi-layered structure that is suitable for high-speed and high-frequency applications. Hence, they are used extensively in electronic packaging assemblies for high-density applications. However, numerous composite parts and complex material properties of multi-layer PCBs complicate the reliability simulation of PCB model. This paper deals with a finite element analysis intended to describe numerically the behavior of multi-layered multi-materials PCB model (combination of metallic and composite plies) in the drop-impact performance. Through the comparison of physical drop test results, the fully multi-layered model illustrates higher accuracy if compared with that of the traditional simplified isotropic model and orthotropic model. The effects of material properties for the multi-layer PCB under drop-impact shock have also been investigated.     

Microstructure evolution of the Sn–Ag–y%Cu interconnect

The lead free Sn–Ag–y%Cu (y = 0.0, 0.5, 1.0 and 2.0) interconnect interfacial microstructures and the microstructure evolution under thermal treatment (isothermal aging, 150 °C/1000 h) were studied in detail by using surface microetching microscopy and cross section microscopy. The corresponding mechanical and reliability behaviors were evaluated by performing shear test and fracture mode analysis before and after the thermal treatment. The results indicate: (i) The interconnects could have different microstructures and intermetallic compound (IMC), depending on the Cu content. The Cu–Sn IMC could have microstructures that were clusters or protrusion-like, Augustine grass leaf-like, scissor-like, tweezers-like, etc. (ii) Ag₃Sn IMCs were not observed at time zero for any interconnect groups, but they occurred after the aging for all groups. The Ag₃Sn IMC could have different microstructures, again depending on Cu content. For low Cu content, the Ag₃Sn IMCs were granules or nodules; for higher Cu content, Ag₃Sn IMCs were plate-like. (iii) The growth of Ag₃Sn plates was promoted by the growth of Cu–Sn IMCs, but indirectly linked to the Cu content. (iv) High Cu content (1.0 wt% and higher) could degrade the mechanical and reliability performances of the LF interconnect by providing a brittle joint, which was mainly achieved through the substantial growth of Cu–Sn IMCs and Ag₃Sn plates.     

Structural reliability assessment of multi-stack package (MSP) under high temperature storage (HTS) testing condition

Wire ball open failure at the interface of the gold wire and bonding pad of a multi-stack package (MSP) under high temperature storage (HTS) condition of 150 °C is studied. Failure analysis using FIB-SEM was conducted by in-plane moiré interferometry and FEA to clarify the failure mechanism. The ball open failure due to Kirkendall void that results from metal diffusion at high temperature was accelerated by the tensile stress imposed at the gold wire. The tensile stress developed at the gold wire when packages showing different warpage behaviours were stacked. Mechanical interaction between top and bottom packages caused unstable warpage, readily twisted and saddled. The wire came in contact with the photo-sensitive solder resist (PSR) dam because of the unstable warpage and this contact resulted in tensile stress at the gold wires. Solder flux residues reacted with the encapsulant, and as a result, the encapsulant of the top package adhered to the chip of the bottom package, and this adherence created additional tensile stress at the gold wires. To reduce the tensile stress at the wires, the PSR dam was removed, loop shape was altered from 45° to 90°, water soluble flux was applied, and cleaning process was added. HTS reliability was significantly improved and guaranteed after reducing the tensile stress at the wires.     

Quantum-mechanical effects and gate leakage current of nanoscale n-type FinFETs: A 2d simulation study

This paper simulates a kind of new sub-50 nm n-type double gate MOS nanotransistors by solving coupled Poisson-Schrödinger equations in a self-consistent manner with a finite element method, and presents a systematic simulation-based study on quantum-mechanical effects, gate leakage current of FinFETs. The simulation results indicate that the deviation from the classical model becomes more important as the gate oxide, gate length and Fin channel width becomes thinner and the Fin channel doping increases. Gate tunneling current density reduces with the body thickness decreasing. Excessive scaling increases the gate current below Fin thickness of 5 nm. The gate current can be dramatically reduced beyond 10¹⁷ cm⁻³ with the Fin body doping increasing. In order to understand the influence of electron confinement, quantum mechanical simulation results are also compared with the results from the classical approach. Our simulation results indicate that quantum mechanical simulation is essential for the realistic optimization of the FinFET structure.