An evolution to crossbar switches with virtual output queuing and buffered cross points

Input queued (IQ) switch architectures with virtual output queues (VOQ) scale up to very high speeds and have been a subject of intense research in the past decade. VOQ IQ switches require switch matrix scheduling algorithms to match input ports to out ports. In this tutorial article, we present an overview of switch matrix scheduling for VOQ IQ switches with crossbar switch fabrics. We then describe what we believe will be the next generation of high-speed crossbar switches: the evolution of IQ switches to combined input and crossbar queued (CICQ) switches. With the continued increase in density of VLSI, sufficient buffering at crossbar cross points for one cell or packet has become feasible to implement. We show how CICQ switches have simple schedulers and result in lower delay than IQ switches. Both IQ and CICQ switches have unstable regions. We show how a threshold and bursting technique can feasibly achieve stability. We also show how CICQ switches are better suited (than IQ switches) for switching of variable-length packets such as IP packets. Many challenges remain in IQ and CICQ switches. In particular, the inclusion of QoS scheduling methods that are currently only suitable for output queued switches is a major open problem.     

Software-Defined Fog Network Architecture for IoT

Rapid increase in number and diversity of Internet-connected devices raises many challenges for the traditional network architecture, which is not designed to support a high level of scalability, real-time data delivery and mobility. To address these issues, in this paper we present a new model of Internet of Things architecture which combines benefits of two emerging technologies: software-defined networking and Fog computing. Software-defined networking implies a logically centralized network control plane, which allows implementation of sophisticated mechanisms for traffic control and resource management. On the other hand, Fog computing enables some data to be analysed and managed at the network edge, thus providing support for applications that require very low and predictable latency. In the paper, we give detailed insight into the system structure and functionality of its main components. We also discuss the benefits of the proposed architecture and its potential services.