Optimal nonnegative color scanning filters

In this correspondence, the problem of designing color scanning filters for multi-illuminant color recording is considered. The filter transmittances are determined from a minimum-mean-squared orthogonal tristimulus error criterion that minimizes the color error in estimates obtained from noisy recorded data. Nonnegativity constraints essential for physical realizability are imposed on the filter transmittances. In order to demonstrate the significant improvements obtained, the resulting filters are compared with suboptimal filters reported in earlier literature.     

Some soft measures for performance analysis: The “core” dimensions of expert system quality

The post-implementation evaluation of new technologies such as artificial intelligence, multimedia or parallel computing systems which are in operation is a much neglected problem. There is a lack of methods, techniques and tools for the practitioner to analyze the performance such systems. In earlier work, we have presented a framework and methodology that described a socio-technical approach for evaluating expert systems. In short, we determined the features and characteristics of expert systems that are most critical for their “implementation success”. This was the result of empirical evidence from a first-ever field study of expert systems in production. In this paper, specifically tailored to an audience of generalists, we retrospectively put our work into the framework of performance measurement and analysis. The end-result of our investigations is that we have definitional clarity as to how we may alternately evaluate such decision support systems.     

On the uniformly minimum variance unbiased estimator of availability with type I censored data

This paper develops the uniformly minimum variance unbiased estimator of the pointwise availability with type I censored data. The maximum likelihood estimator has also been highlighted.     

MOSFET substrate current model for circuit simulation

A simple, accurate MOSFET substrate current model suitable for a circuit simulator is presented. The effect of substrate bias on substrate current is modeled without introducing additional parameters. The accuracy of this model is demonstrated by its ability to fit the experimental data for both standard and LDD devices with average errors of less than 6%. The new model is compared with the substrate current models reported in the literature. In addition, the temperature dependence of the substrate current in the range of 0-120°C is also modeled. The new model has been implemented in a circuit-level hot-electron reliability simulator, and the results obtained from simulation of an inverter circuit are presented     

Two new canonic single-CFOA oscillators with single resistor controls

Although a number of single current feedback op-amps (CFOA)-based single-resistance-controlled oscillators (SRCO) have appeared in earlier literature, only six of them are canonic (i.e., requiring only two capacitors and only three resistors). The object of this brief is to add to this list two new canonic single-CFOA-based SRCO configurations. An evaluation of these two new circuits has been carried out and their workability of has been confirmed by experimental results based upon AD844 CFOAs.     

High Performance Process Variations Aware Technique for Sub-threshold 8T-SRAM Cell

The demand of low power high density integrated circuits is increasing in modern battery operated portable systems. Sub-threshold region of MOS transistors is the most desirable region for energy efficient circuit design. The operating ultra-low power supply voltage is the key design constraint with accurate output performance in sub-threshold region. Degrading of the performance metrics in Static random access memory (SRAM) cell with process variation effects are of major concern in sub-threshold region. In this paper, a bootstrapped driver circuit and a bootstrapped driver dynamic body biasing technique is proposed to assist write operation which improves the write-ability of sub-threshold 8T-SRAM cell under process variations. The bootstrapped driver circuit minimizes the write delay of SRAM cell. The bootstrapped driver dynamic body bias increases the output voltage levels by boosting factor therefore increasing in switching threshold voltage of MOS devices during hold and read operation of SRAM latch. The increment in threshold voltage improves the static noise margin and minimizing the process variation effects. Monte-Carlo simulation results with 3 \(\sigma \) Gaussian distributions show the improvements in write delay by 11.25 %, read SNM by 12.20 % and write SNM by 12.57 % in 8T-SRAM cell under process variations at 32 nm bulk CMOS process technology node.     

Triple Band Annular Ring Loaded Stacked Circular Patch Microstrip Antenna

In this paper a novel structure of annular ring loaded stacked circular patch microstrip antenna is theoretically analysed to observe various parameters such as return loss, input impedance, gain, directivity and radiation pattern. It is found that antenna possess three band of operation which signify the compactness and multiband operation of antenna. The antenna is resonating at three operating frequencies 1.720, 2.950, 3.060 GHz. The proposed theory is verified by simulation using Ansoft’s HFSS and theoretical results are in good agreement with simulated results. The antenna is useful for multi-services operations such as WLAN, GSM, UMTS, and WiMAX services.     

Effect of nanoimprinted surface relief on Si and Ge nucleation and ordering

Surface relief formed by nanoimprinting and etching into a thermally grown SiO₂ layer on Si was used to position the initial nuclei formed by chemically vapor deposited Si and Ge. By controlling the deposition conditions, the surface diffusion length was adjusted to be comparable to or larger than the spacing between features, thus favoring nucleation adjacent to steps, rather than random nucleation. Random nucleation was further suppressed by a two-stage deposition process. Ge nucleation on oxide by chemical vapor deposition was enhanced by coating the oxide surface with an organic self-assembled monolayer (SAM) and by the nanoimprinted surface relief. The nanoimprinted surface relief also provides long-range order in the SAM.     

Effect of voltage sweep direction on the performance evaluation of P3HT : PCBM solar cells

Investigations on the effect of direction of voltage sweeps, on the current density–voltage (J–V) characteristics in polymer bulk‐heterojunction solar cells, based on the blend of poly(3‐hexylthiophene) (P3HT) and phenyl [6,6] C₆₁ butyric acid methyl ester (PCBM), are reported with time. On the freshly prepared device, the direction of the voltage sweep did not have any effect; however, as the device started degrading, the change in direction of the voltage sweep resulted into different characteristics. Analysis beyond complete degradation, when all the photovoltaic parameters reduced to zero, revealed some interesting results. The J–V characteristics, measured with voltage sweep from −ve to +ve voltage, both in the dark and under illumination, were observed to pass through the second quadrant. On the other hand, with the change in the direction of voltage sweep, viz. from +ve to −ve voltage, the characteristics both in the dark and under illumination passed through the fourth quadrant. These results have been explained on the basis of polarization of the degraded active layer due to applied external voltage. This is an important effect and is observed to depend on the applied voltages during performance evaluation and becomes more prominent with time. This effect puts a question mark on the correctness of the method for calculation of the parameters of a degraded device. Studies on degradation of P3HT : PCBM solar cells showed that both the short circuit current density (J_sc) and the power conversion efficiency (η) decay exponentially, whereas the open circuit voltage (V_oc) decays almost linearly with time. Copyright © 2012 John Wiley & Sons, Ltd.