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41.
Cooperative self-assembly (co-assembly) of diblock copolymers (DBCs) and inorganic precursors that takes inspiration from the rich phase separation behavior of DBCs can enable the realization of a broad spectrum of functional nanostructures with the desired sizes. In a DBC assisted sol–gel chemistry approach with polystyrene-block-poly(ethylene oxide) and ZnO, hybrid films are formed with slot-die coating. Pure DBC films are printed as control. In situ grazing-incidence small-angle X-ray scattering measurements are performed to investigate the self-assembly and co-assembly process during the film formation. Combining complementary ex situ characterizations, several distinct regimes are differentiated to describe the morphological transformations from the initially solvent-dispersed to the ultimately solidified films. The comparison of the assembly pathway evidences that the key step in the establishment of the pure DBC film is the coalescence of spherical micelles toward cylindrical domains. Due to the presence of the phase-selective precursor, the formation of cylindrical aggregates in the solution is crucial for the structural development of the hybrid film. The pre-existing cylinders in the ink impede the domain growth of the hybrid film during the subsequent drying process. The precursor reduces the degree of order, prevents crystallization of the PEO block, and introduces additional length scales in the hybrid films.  相似文献   
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Due to the increasing demands on efficiency, performance and flexibility reconfigurable computational architectures are very promising candidates in embedded systems design. Recently coarse-grained reconfigurable array architectures (CGRAs), such as the ADRES CGRA and its corresponding DRESC compiler are gaining more popularity due to several technological breakthroughs in this area. We investigate the mapping of two image processing algorithms, Wavelet encoding and decoding, and TIFF compression on this novel type of array architectures in a systematic way. The results of our experiments show that CGRAs based on ADRES and its DRESC compiler technology deliver improved performance levels for these two benchmark applications when compared to results obtained on a state-of-the-art commercial DSP platform, the c64x DSP from Texas Instruments. ADRES/DRESC can beat its performance by at least 50% in cycle count and the power consumption even drops to 10% of the published numbers of the c64x DSP.  相似文献   
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This paper explores the use of ethnographic research to help companies design, build, and implement products and services that meet the stated and unstated needs of consumers. Although many products enjoy an international presence in the global economy, the market is far from homogeneous. Cultural practices and beliefs strongly influence the meaning and, consequently, the usage of products. If a product is not culturally resonant, the product may not be adopted by consumers - no matter how technologically advanced or innovative the product may be. Specifically, this paper explores mobile phone, and advanced network I-mode adoption in Japan. Research methodologies used in the case study are described, including how these techniques elucidate the various social and cultural processes that influence adoption. In order to develop wireless and other mobile communication solutions that are culturally, emotionally, and technically satisfying for users, the current “ global paradigm” must be reconsidered. Incorporating anthropology into the design process is a crucial first step in helping telecommunication companies define their next generation of products and services in the mobile communications arena.  相似文献   
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The telecommunication systems require introduction of high performance devices especially for microwave applications. The emergence of molecular beam epitaxy as a growth technique allows the fabrication of heterostructure-based performing devices. Thus, this communication will focus on the reliability of technologies used for the development of field effect transistor using heterostructures and called HEMT (high electron mobility transistor).  相似文献   
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Selective packet dropping policies have been used to reduce congestion and transmission of traffic that would inevitably be retransmitted. For data applications using best-effort services, packet dropping policies (PDPs) are congestion management mechanisms implemented at each intermediate node that decide, reactively or proactively, to drop packets to reduce congestion and free up precious buffer space. While the primary goal of PDPs is to avoid or combat congestion, the individual PDP designs can significantly affect application throughput, network utilization, performance fairness, and synchronization problems with multiple Transmission Control Protocol (TCP) connections. Scalability and simplicity are also important design issues. This article surveys the most important selective packet dropping policies that have been designed for best-effort traffic in ATM and IP networks, providing a comprehensive comparison between the different mechanisms.  相似文献   
49.
减少二氧化碳的排放和可持续性发展——这些是我们这个时代的流行语。为了不辜负这些今天和明天的流行语,需要先进的电控驱动技术涉足新的领域。其中一个最大且最具挑战性的领域是汽车产业.现有的功率模块无法满足该行业的严格要求,这就是为什么它们不能服务市场的原因。为了面对这项挑战,赛米控开发了SKiM(赛米控集成模块),适用于汽车工业的IGBT模块。[编者按]  相似文献   
50.
A large effort is devoted to the research of new computing paradigms associated with innovative nanotechnologies that should complement and/or propose alternative solutions to the classical Von Neumann/CMOS (complementary metal oxide semiconductor) association. Among various propositions, spiking neural network (SNN) seems a valid candidate. i) In terms of functions, SNN using relative spike timing for information coding are deemed to be the most effective at taking inspiration from the brain to allow fast and efficient processing of information for complex tasks in recognition or classification. ii) In terms of technology, SNN may be able to benefit the most from nanodevices because SNN architectures are intrinsically tolerant to defective devices and performance variability. Here, spike‐timing‐dependent plasticity (STDP), a basic and primordial learning function in the brain, is demonstrated with a new class of synapstor (synapse‐transistor), called nanoparticle organic memory field‐effect transistor (NOMFET). This learning function is obtained with a simple hybrid material made of the self‐assembly of gold nanoparticles and organic semiconductor thin films. Beyond mimicking biological synapses, it is also demonstrated how the shape of the applied spikes can tailor the STDP learning function. Moreover, the experiments and modeling show that this synapstor is a memristive device. Finally, these synapstors are successfully coupled with a CMOS platform emulating the pre‐ and postsynaptic neurons, and a behavioral macromodel is developed on usual device simulator.  相似文献   
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