Herding stochastic autonomous agents via local control rules and online target selection strategies

Autonomous Robots - We propose a simple yet effective set of local control rules to make a small group of “herder agents” collect and contain in a desired region a large ensemble of...     

Prototyping and modeling of the centrifugal casting process for paraffin waxes

Centrifugal casting is a technology used for manufacturing hybrid rocket paraffin grains. This technology helps avoiding voids formation inside the solid paraffin as it cools. Voids are formed because of air bubbles being entrapped while pouring and because the liquid wax shrinks by 17–19% upon cooling. In this work, the centrifugal casting process for the manufacturing of paraffin cylinders was prototyped at two different scales considering critical casting issues. The effects of process parameters (rotational speed, melt temperature, and flow rate) on the tensile properties of the manufactured grains were analyzed. The results of the optimization conducted at the lower scale (2.5?kg) were up scaled to manufacture 25?kg grains. The resulting mechanical properties complied with the design specifications, and they were better than those characterized from the gravity cast wax. A numerical model of growth and dissolution of bubbles during the process was then developed to predict the quality of the castings. The numerical results showed how increasing the mold rotational speed up to 1800?rpm reduced the removal time. However, compared to grains solidification time, the predicted removal times were much shorter, proving the advantage of centrifugal casting in counteracting voids formation.     

Post-Event Site Investigation,Monitoring, Stability Analysis,and Modeling of a Gas Pipeline Explosion

This paper describes the results of site investigations, monitoring, stability analyses, and soil-pipe interaction modeling of a built-up slope located near Pineto (Abruzzo Province, Central Italy), where a gas pipeline exploded on March 6th, 2015, due to heavy rains inducing slope movements. The slope is formed by OC clay, covered with an upper 10- to 14-m-thick clayey-sandy silt colluvial layer. The explosion in the upper portion of the slope caused extensive damage to existing buildings and threatened human lives. Soon after the event, a site investigation and monitoring program was carried out. A detailed topographic survey and hydrological data were analyzed in order to characterize possible critical rainfall events. The stability of the slope was analyzed both in pre- and in post-explosion conditions. The profiles of the DMT horizontal stress index K _D helped to identify multiple slip surfaces. Then, the results of the site investigation and stability analyses were used to implement a simplified finite element model aimed to describe the soil-pipeline interaction, taking into account the role of the observed wrinkle in the pipeline. The numerical simulations reveal the crucial role played by the slope movements, and by the wrinkle as well, in inducing the collapse of the pipe.     

Performance evaluation of efficient multi-objective evolutionary algorithms for design space exploration of embedded computer systems

Multi-objective evolutionary algorithms (MOEAs) have received increasing interest in industry because they have proved to be powerful optimizers. Despite the great success achieved, however, MOEAs have also encountered many challenges in real-world applications. One of the main difficulties in applying MOEAs is the large number of fitness evaluations (objective calculations) that are often needed before an acceptable solution can be found. There are, in fact, several industrial situations in which fitness evaluations are computationally expensive and the time available is very short. In these applications efficient strategies to approximate the fitness function have to be adopted, looking for a trade-off between optimization performance and efficiency. This is the case in designing a complex embedded system, where it is necessary to define an optimal architecture in relation to certain performance indexes while respecting strict time-to-market constraints. This activity, known as design space exploration (DSE), is still a great challenge for the EDA (electronic design automation) community. One of the most important bottlenecks in the overall design flow of an embedded system is due to simulation. Simulation occurs at every phase of the design flow and is used to evaluate a system which is a candidate for implementation. In this paper we focus on system level design, proposing an extensive comparison of the state-of-the-art of MOEA approaches with an approach based on fuzzy approximation to speed up the evaluation of a candidate system configuration. The comparison is performed in a real case study: optimization of the performance and power dissipation of embedded architectures based on a Very Long Instruction Word (VLIW) microprocessor in a mobile multimedia application domain. The results of the comparison demonstrate that the fuzzy approach outperforms in terms of both performance and efficiency the state of the art in MOEA strategies applied to DSE of a parameterized embedded system.     

Minutia Cylinder-Code: a new representation and matching technique for fingerprint recognition

In this paper, we introduce the Minutia Cylinder-Code (MCC): a novel representation based on 3D data structures (called cylinders), built from minutiae distances and angles. The cylinders can be created starting from a subset of the mandatory features (minutiae position and direction) defined by standards like ISO/IEC 19794-2 (2005). Thanks to the cylinder invariance, fixed-length, and bit-oriented coding, some simple but very effective metrics can be defined to compute local similarities and to consolidate them into a global score. Extensive experiments over FVC2006 databases prove the superiority of MCC with respect to three well-known techniques and demonstrate the feasibility of obtaining a very effective (and interoperable) fingerprint recognition implementation for light architectures.     

A coarse-grain reconfigurable architecture for multimedia applications supporting subword and floating-point calculations

Signal processors exploiting ASIC acceleration suffer from sky-rocketing manufacturing costs and long design cycles. FPGA-based systems provide a programmable alternative for exploiting computation parallelism, but the flexibility they provide is not as high as in processor-oriented architectures: HDL or C-to-HDL flows still require specific expertise and a hardware knowledge background. On the other hand, the large size of the configuration bitstream and the inherent complexity of FPGA devices make their dynamic reconfiguration not a very viable approach. Coarse-grained reconfigurable architectures (CGRAs) are an appealing solution but they pose implementation problems and tend to be application specific. This paper presents a scalable CGRA which eases the implementation of algorithms on field programmable gate array (FPGA) platforms. This design option is based on two levels of programmability: it takes advantage of performance and reliability provided by state-of-the-art FPGA technology, and at the same time it provides the user with flexibility, performance and ease of reconfiguration typical of standard CGRAs. The basic cell template provides advanced features such as sub-word SIMD integer and floating-point computation capabilities, as well as saturating arithmetic. Multiple reconfiguration contexts and partial run-time reconfiguration capabilities are provided, tackling this way the problem of high reconfiguration overhead typical of FPGAs. Selected instances of the proposed architecture have been implemented on an Altera Stratix II EP2S180 FPGA. On this system, we mapped some common DSP, image processing, 3D graphics and audio compression algorithms in order to validate our approach and to demonstrate its effectiveness by benchmarking the benefits achieved.     

A hybrid particle swarm optimization approach for the sequential ordering problem

The sequential ordering problem is a version of the asymmetric travelling salesman problem where precedence constraints on vertices are imposed. A tour is feasible if these constraints are fulfilled, and the objective is to find a feasible solution with minimum cost.     

The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform

Reconfigurable computing offers a wide range of low cost and efficient solutions for embedded systems. The proper choice of the reconfigurable device, the granularity of its processing elements and its memory architecture highly depend on the type of application and their data flow. Existing solutions either offer fine grain FPGAs, which rely on a hardware synthesis flow and offer the maximum degree of flexibility, or coarser grain solutions, which are usually more suitable for a particular type of data flow and applications. In this paper, we present the MORPHEUS architecture, a versatile reconfigurable heterogeneous System-on-Chip targeting streaming applications. The presented architecture exploits different reconfigurable technologies at several computation granularities that efficiently address the different applications needs. In order to efficiently exploit the presented architecture, we implemented a complete software solution to map C applications to the reconfigurable architecture. In this paper, we describe the complete toolset and provide concrete use cases of the architecture.