Performance of adaptive token allocation in the leaky bucket

The leaky bucket is a popular method that can regulate traffic into an ATM broadband network. This paper examines a simple but innovative modification that would also provide priority to access the network. This is done by requiring cells of different classes to obtain different numbers of tokens before receiving their services. As a step further, a dynamic scheme can be used in which the tokens allocated to each class are changed according to the traffic load. Performance evaluations of mean cell delays and cell loss probabilities are obtained to provide insight into the behaviour of the system and to provide guideline for furture design.     

Low-power design techniques for high-performance CMOS adders

A high-performance adder is one of the most critical components of a processor which determines its throughput, as it is used in the ALU, the floating-point unit, and for address generation in case of cache or memory access. In this paper, low-power design techniques for various digital circuit families are studied for implementing high-performance adders, with the objective to optimize performance per watt or energy efficiency as well as silicon area efficiency. While the investigation is done using 100 MHz, 32 b carry lookahead (CLA) adders in a 0.6 μm CMOS technology, most techniques presented here can also be applied to other parallel adder algorithms such as carry-select adders (CSA) and other energy efficient CMOS circuits. Among the techniques presented here, the double pass-transistor logic (DPL) is found to be the most energy efficient while the single-rail domino and complementary pass-transistor logic (CPL) result in the best performance and the most area efficient adders, respectively. The impact of transistor threshold voltage scaling on energy efficiency is also examined when the supply voltage is scaled from 3.5 V down to 1.0 V     

An alternative method to fabricate the planar-type resonant-cavity light-emitting diodes by using silicon oxide for short-reach communications

In this article, the silicon oxide (SiO_x) planarization technique is presented to fabricate the 650-nm resonant-cavity light-emitting diodes (RCLEDs). The performances of RCLEDs are characterized by forward voltage, light output power, external quantum efficiency, emission spectrum, and dynamic response. As a result, the device with the SiO_x-planarized layer exhibits a low operating voltage of 2.3 V at 20 mA, a maximum light output power of 304 μW at 15 mA, and the best external quantum efficiency of 3% at 1.2 mA. In addition, the SiO_x-planarized device exhibits temperature insensitivity as compared to the device without it. The RCLED with a 30-μm diameter shows the maximum 3 dB frequency bandwidth of 275 MHz at a driving current of 40 mA. Finally, the RCLED with a SiO_x-planarized layer shows a clear eye-opening feature as operating at 100 Mbit/s at 20 mA. These results indicate that such LEDs are excellent candidates for use in high-speed short-reach plastic optical fiber communications.     

Circularly polarized array antenna with corporate-feed network and series-feed elements

In this paper, corporate-feed circularly polarized microstrip array antennas are studied. The antenna element is a series-feed slot-coupled structure. Series feeding causes sequential rotation effect at the element level. Antenna elements are then used to form the subarray by applying sequential rotation to their feeding. Arrays having 4, 16, and 64 elements were made. The maximum achieved gains are 15.3, 21, and 25.4 dBic, respectively. All arrays have less than 15 dB return loss and 3 dB axial ratio from 10 to 13 GHz. The patterns are all quite symmetrical.     

A Multi‐Functional Highly Efficient Upconversion Luminescent Film with an Array of Dielectric Microbeads Decorated with Metal Nanoparticles

Upconversion nanoparticles (UCNPs) have been integrated with photonic platforms to overcome the intrinsically low quantum efficiency limit of upconversion luminescence (UCL). However, platforms based on thin films lack transferability and flexibility, which hinders their broader and more practical application. A plasmonic structure is developed that works as a multi‐functional platform for flexible, transparent, and washable near‐infrared (NIR)‐to‐visible UCL films with ultra‐strong UCL intensity. The platform consists of dielectric microbeads decorated with plasmonic metal nanoparticles on an insulator/metal substrate. Distinct improvements in NIR confinement, visible light extraction, and boosted plasmonic effects for upconversion are observed. With weak NIR excitation, the UCL intensity is higher by three orders of magnitude relative to the reference platform. When the microbeads are organized in a square lattice array, the functionality of the platform can be expanded to wearable and washable UCL films. The platform can be transferred to transparent, flexible, and foldable films and still emit strong UCL with a wide viewing angle.     

Generalisation of inter-layer intra prediction for scalable video coding

In the scalable video coding (SVC) standard, a simple inter-layer intra prediction (ILIP) method has been adopted to reduce the bit rate of scalable video sequences. Proposed is an improved ILIP method by generalising the original one adopted in the SVC. Experimental results show that the proposed method can reduce bit rates by 4.1 to 5.9%, compared with the original one, while average PSNR is not decreased.     

Low temperature annealing behaviors of the titanium films formed by the ionized sputtering process on (001) silicon substrates

We investigated the low temperature reactions between the Ti films created by the ionized sputtering process and the (001) single crystal silicon wafers using high resolution transmission electron microscopy and x-ray diffractometry. We observed that the amorphous Ti-Si intermixed layer is formed at the Ti-Si interface whose thickness increased with the thickness of the deposited Ti films. The amorphous interlayer grew upon annealing treatments at the temperatures below 450°C. We also observed that the crystallization of the amorphous interlayer occurred upon annealing at 500°C. The first formed phase is Ti₅Si₃ in contact with Ti films, which is epitaxial with Ti films. Upon further annealing at 500°C, the Ti₅Si₄ phase and C49 TiSi₂ phase formed in the regions close to Ti films and Si substrates, respectively.     

Design and implementation of multicasting for multi-channel multi-interface wireless mesh networks

Multicasting is a useful communication method in wireless mesh networks (WMNs). Many applications in WMNs require efficient and reliable multicast communications, i.e., high delivery ratio with low overhead among a group of recipients. In spite of its significance, little work has been done on providing such multicast service in multi-channel WMNs. Traditional multicast protocols for wireless and multi-hop networks tend to assume that all nodes, each of which is equipped with a single interface, collaborate on the same channel. This single-channel assumption is not always true, as WMNs often provide nodes with multiple interfaces to enhance performance. In multi-channel and multi-interface (MCMI) WMNs, the same multicast data must be sent multiple times by a sender node if its neighboring nodes operate on different channels. In this paper, we try to tackle the challenging issue of how to design a multicast protocol more suitable for MCMI WMNs. Our multicast protocol builds multicast paths while inviting multicast members, and tries to allocate the same channel to neighboring members in a bottom-up manner. By unifying fixed channels of one-hop multicast neighbors, the proposed algorithm can improve the performance such as reducing multicast data transmission overhead and delay, while managing a successful delivery ratio. In order to prove such expectation on the performance, we have implemented and evaluated the proposed solution on the real testbed having the maximum 24 nodes, each of which is equipped with two IEEE 802.11a Atheros WLAN cards.     

Effects of Interfacial Dielectric Layers on the Electrical Performance of Top‐Gate In‐Ga‐Zn‐Oxide Thin‐Film Transistors

We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top‐gate In‐Ga‐Zn‐oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below 200°C, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as Si₃N₄ and Al₂O₃, the electrical properties are analyzed. After post‐annealing at 200°C for 1 hour in an O₂ ambient, the sub‐threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative‐bias stress tests on TFTs with a Si3N4 IDL, the degradation sources are closely related to unstable bond states, such as Si‐based broken bonds and hydrogen‐based bonds. From constant‐current stress tests of Id = 3 µA, an IGZO‐TFT with heat‐treated Si₃N₄ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge‐injection and electron‐trapping behavior.