Training and optimization of an artificial neural network controlling a hybrid power filter

A hybrid power compensator (HPC) consisting of a static VAr compensator and a dynamic compensator needs to be optimally controlled during the compensation of nonlinear loads. The HPC must be controlled to meet minimum requirements in terms of power factor and harmonic distortion, while at the same time minimizing its total cost. An artificial neural network (ANN) is used to control the HPC amidst a very dynamic power system environment. The performance of a reference ANN is evaluated while controlling an HPC connected to a typical nonlinear industrial load. The training and performance of the ANN is then optimized in terms of training set size, training set packing and ANN topology and the performance compared to the reference ANN. This paper highlights the importance of optimising the mentioned ANN parameters to achieve optimum ANN training and modeling accuracy. The results obtained reveals that the application of an ANN in controlling an HPC is feasible given that the ANN parameters are chosen appropriately.     

Synthesis of ZSM‐5 Films and Monoliths with Bimodal Micro/Mesoscopic Structures

A route to synthesize ZSM‐5 crystals with a bimodal micro/mesoscopic pore system has been developed in this study; the successful incorporation of the mesopores within the ZSM‐5 structure was performed using tetrapropylammonium hydroxide (TPAOH)‐impregnated mesoporous materials containing carbon nanotubes in the pores, which were encapsulated in the ZSM‐5 crystals during a solid rearrangement process within the framework. Such mesoporous ZSM‐5 zeolites can be readily obtained as powders, thin films, or monoliths.     

The First Template‐Free Growth of Crystalline Silicon Microtubes

A simple template‐free high‐temperature evaporation method was developed for the growth of crystalline Si microtubes for the first time. As‐grown Si microtubes were characterized using X‐ray diffraction, scanning electron microscopy, transmission electron microscopy, and room‐temperature photoluminescence. The lengths of the Si tubes can reach several hundreds of micrometers; some of them have lengths on the order of millimeters. Each tube has a uniform outer diameter along its entire length, and the typical outer diameter is ≈ 2–3 μm. Most of the tubes have a wall thickness of ≈ 400–500 nm, though a considerable number of them exhibit a very thin wall thickness of ≈ 50 nm. Room‐temperature photoluminescence measurement shows the as‐synthesized Si microtubes have two strong emission peaks centered at ≈ 589 nm and ≈ 617 nm and a weak emission peak centered at ≈ 455 nm. A possible mechanism for the formation of these Si tubes is proposed. We believe that the present discovery of the crystalline Si microtubes will promote further experimental studies on their physical properties and smart applications.     

Optimal pilot waveform assisted modulation for ultrawideband communications

Ultrawideband (UWB) transmissions induce pronounced frequency-selective fading effects in their multipath propagation. Multipath diversity gains can be collected to enhance performance, provided that the underlying channel can be estimated at the receiver. To this end, we develop a novel pilot waveform assisted modulation (PWAM) scheme that is tailored for UWB communications. We select our PWAM parameters by jointly optimizing channel estimation performance and information rate. The resulting transmitter design maximizes the average capacity, which is shown to be equivalent to minimizing the mean-square channel estimation error, and thereby achieves the Crame/spl acute/r-Rao lower bound. Application of PWAM to practical UWB systems is promising because it entails simple integrate-and-dump operations at the frame rate. Equally important, it offers a flexible UWB channel estimator, capable of striking desirable rate-performance tradeoffs depending on the channel coherence time.     

Effect of the Distribution of Manganese Ions on the Properties of Mn-Doped (Ba,Y)TiO3 PTCR Ceramics

The electrical properties and microstructure of (Ba,Y)TiO₃ PTCR ceramics were studied. The results indicate that the Mn ions increase the intergranular barrier height and produce a high-resistance layer on the grain surface. The temperature-dependent resistances of the grain bulk, surface layer, and grain boundaries, the temperature coefficient of resistance, and the magnitude of the varistor effect were assessed as a function of Mn content.     

Science in High Magnetic Fields: What Could Be Learned?

High magnetic fields are one of the most powerful tools available to scientists for the study, modification and control of matter. This includes the knowledge on correlations effects, interaction mechanisms, structural information and understanding of mesoscopic effects. In this context, a review of recent scientific achievements at the Grenoble High Magnetic Laboratory is given to illustrate, on specific examples, the power of the Magnetic Field probe.     

Structural Changes Induced in Nonstoichiometric Titanium Carbide by High-Temperature Deformation

The microstructure evolution in nonstoichiometric titanium carbide is studied during high-temperature deformation at high strain rates and low strains (shock compression) and at slow strain rates and high strains (superplastic regime). The results demonstrate that high-temperature deformation in a broad range of strain rates offers a means of controlling the microstructure of titanium carbide. By varying deformation conditions, one can obtain materials differing in microstructure and chemical composition, in particular, with equilibrium and nonequilibrium microstructures. Accordingly, the physicochemical properties of such materials also differ.     

Influence of device engineering on the analog and RF performances of SOI MOSFETs

This work presents a systematic comparative study of the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m. We introduce the transconductance-over-drain current ratio and Early voltage as key figures of merits for the analog MOS performance and the gain and the transition and maximum frequencies for RF performances and link them to device engineering. Specifically, we investigate the effects of HALO implantation in FD, PD, and bulk devices, of film thickness in FD, of substrate doping in SOI, and of nonstandard channel engineering (i.e., asymmetric Graded-channel MOSFETs and gate-body contacted DTMOS).     

On the physical and logical topology design of large-scale optical networks

We consider the problem of designing a network of optical cross-connects (OXCs) to provide end-to-end lightpath services to large numbers of label switched routers (LSRs). We present a set of heuristic algorithms to address the combined problem of physical topology design (i.e., determine the number of OXCs required and the fiber links among them) and logical topology design (i.e., determine the routing and wavelength assignment for the lightpaths among the LSRs). Unlike previous studies which were limited to small topologies with a handful of nodes and a few tens of lightpaths, we have applied our algorithms to networks with hundreds or thousands of LSRs and with a number of lightpaths that is an order of magnitude larger than the number of LSRs. In order to characterize the performance of our algorithms, we have developed lower bounds which can be computed efficiently. We present numerical results for up to 1000 LSRs and for a wide range of system parameters such as the number of wavelengths per fiber, the number of transceivers per LSR, and the number of ports per OXC. The results indicate that it is possible to build large-scale optical networks with rich connectivity in a cost-effective manner, using relatively few but properly dimensioned OXCs.     

Static energy reduction techniques for microprocessor caches

Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of static energy consumption due to subthreshold leakage current in cache memory arrays. This paper compares three techniques for reducing static energy consumption in on-chip level-1 and level-2 caches. One technique employs low-leakage transistors in the memory cell. Another technique, power supply switching, can be used to turn off memory cells and discard their contents. A third alternative is dynamic threshold modulation, which places memory cells in a standby state that preserves cell contents. In our experiments, we explore the energy and performance tradeoffs of these techniques. We also investigate the sensitivity of microprocessor performance and energy consumption to additional cache latency caused by leakage-reduction techniques.