Application of neural networks and machine learning in networkdesign

Communication network design is becoming increasingly complex, involving making networks more usable, affordable, and reliable. To help with this, we have proposed an expert network designer (END) for configuring, modeling, simulating, and evaluating large structured computer networks, employing artificial intelligence, knowledge representation, and network simulation tools. We present a neural network/knowledge acquisition machine-learning approach to improve the END's efficiency in solving the network design problem and to extend its scope to acquire new networking technologies, learn new network design techniques, and update the specifications of existing technologies     

Densification involved in the UV-based photosensitivity of silicaglasses and optical fibers

A comprehensive survey of photosensitivity in silica glasses and optical fiber is reviewed. Recent work on understanding the mechanisms contributing to germanium or aluminum doped fiber photosensitivity is discussed within the framework of photoelastic densification models     

Digitally tunable optical filters using arrayed-waveguide grating(AWG) multiplexers and optical switches

Two novel configurations for digitally tunable optical filters based on arrayed-waveguide grating (AWG) multiplexers are described in detail with emphasis on the connection of the AWG multiplexer and optical switches. Performance comparisons show that conventional configurations are disadvantaged by the switch size required and loss imbalance among the optical frequency-division-multiplexed (FDM) channels; the proposed configurations require only O(√(N)) switch elements to select one of N FDM channels, and the loss imbalance is lower by up to 75% in decibel     

A new lateral MOS-gated thyristor with controlling base-current

A new lateral MOS-gated thyristor, called the Base-Current-Controlled Thyristor, is described. This device is designed so that most holes at the on-stage reach the P base through the floating P⁺ region adjacent to the P base and the on-state MOSFET. At the turn-off stage, the interruption of the hole current to the P base due to switching off the above MOSFET occurs simultaneously with the conventional turn-off operation. The concept of this device is verified experimentally by using the fabricated lateral device with the external MOSFET. This device exhibits a better trade-off relation between the on-state voltage and the turn-off time compared uith the conventional MOS-gated thyristor     

A wafer level monitoring method for plasma-charging damage usingantenna PMOSFET test structure

A novel monitoring method for plasma-charging damage is proposed. This method performs a quick and accurate evaluation using antenna PMOSFET. It was found that not only hot-carrier (HC) lifetime but transistor parameters such as initial gate current and substrate current were changed according to the degree of plasma-charging damage. However, the present work suggests that monitoring the shift of drain current after a few seconds of HC stress is a more accurate method to indicate plasma-charging damage. The monitoring method using the present test structure is demonstrated to be useful for realizing highly reliable devices     

Dimer interface of glutathione S-transferase from Arabidopsis thaliana: influence of the G-site architecture on the dimer interface and implications for classification

The three-dimensional structure of glutathione S-transferase from Arabidopsis thaliana has been solved at 2.2 A resolution (Reinemer et al., 1996). The enzyme forms a dimer of two identical subunits. The structure shows a new G-site architecture and a novel and unique dimer interface. Each monomer of the protein forms a separate G-site. Therefore, the requirements on the dimer interface are reduced. As a consequence, the interactions between the monomers are weaker and residues at the dimer interface are more variable. Thus, the dimer interface looses its relevance for a classification of plant glutathione S-transferases and the formation of heterodimers becomes even more difficult to predict.     

Electrical linewidth test structures fabricated in monocrystallinefilms for reference-material applications

The physical widths of reference features incorporated into electrical linewidth test structures patterned in films of monocrystalline silicon have been determined from Kelvin voltage measurements. The films in which the test structures are patterned are electrically insulated from the bulk-silicon substrate by a layer of silicon dioxide provided by SIMOX (Separation by the IMplantation of OXygen) processing. The motivation is to facilitate the development of linewidth reference materials for critical-dimension (CD) metrology-instrument calibration. The selection of the (110) orientation of the starting silicon and the orientation of the structures' features relative to the crystal lattice enable a lattice-plane-selective etch to generate reference-feature properties of rectangular cross section and atomically planar sidewalls. These properties are highly desirable for CD applications in which feature widths are certified with nanometer-level uncertainty for use by a diverse range of CD instruments. End applications include the development and calibration of new generations of CD instruments directed at controlling processes for manufacturing devices having sub-quarter-micrometer features     

A unified diode model for circuit simulation

A new commercially available diode model is described. This unified model is capable of simulating the widest range of diode technologies of any presently available. The emphasis of this paper is on describing the model's extensive features and flexibility in the different domains of operation and is of particular interest in power applications     

Performance evaluation of rule grouping on a real-time expertsystem architecture

Uses a Markov process to model a real-time expert system architecture characterized by message passing and event-driven scheduling. The model is applied to the performance evaluation of rule grouping for real-time expert systems running on this architecture. An optimizing algorithm based on Kernighan-Lin heuristic graph partitioning for the real-time architecture is developed and a demonstration system based on the model and algorithm has been developed and tested on a portion of the advanced GPS receiver (AGR) and manned manoeuvring unit (MMU) knowledge bases