Assessing Mobile Technology Usage for Knowledge Dissemination among Farmers in Punjab

Agriculture-based precise and accurate information needs to be disseminated promptly to farmers so that better decisions such as managing farm fields, making continuous and scientific changes in their production systems and grabbing advantage of market opportunities can be made. In this paper, mobile technology is assessed for the agriculture information dissemination system. A survey has been conducted to find out potential technology, related to the use of the Internet and mobile among farmers in the state of Punjab in India, to deliver agriculture-related information to them. Results show that agricultural information system needs to be developed based on the mass communication technology such as mobile systems. It is also noted that localization and native language of farmers are the concerns to be incorporated into the systems. It has been focused that the use of soft-computing techniques in conjunction with communication networks, for inferring the decision regarding best practices for agricultural activities, is helpful in the development of these systems.     

A grey approach for forecasting in a supply chain during intermittentdisruptions

The supply chains today have become vulnerable to frequent disruptions, and with continuing emphasis on efficiency, lacks robustness to deal with them. A part of the solution lies in forecasting the disruption beforehand and the other part in knowing which policies will suit such disrupted conditions best. Accurate and immediate forecasts are a must in a supply chain and hence play a huge role in stabilizing. This study compares the performance of three established forecasting methods (moving average, weighted moving average and exponential smoothing) as well as grey prediction method, during disruptions and stable situations. The experiments are performed in the form of discrete event simulation, on a four stage beer game settings. The results show that moving average and weighted moving average methods become incompetent during disruptions, and are useful only during stable times, when the demand hovers around a predefined mean value. Exponential smoothing and grey method seems to give better results during disruptions and also during stable times in upstream tiers. Grey prediction method in particular is the best method when the disruption frequency is high and also when the disruption impact is gradual rather than sudden.     

Spatial Wavefunction-Switched (SWS) InGaAs FETs with II–VI Gate Insulators

This paper presents the implementation of a novel InGaAs field-effect transistor (FET), using a ZnSe-ZnS-ZnMgS-ZnS stacked gate insulator, in a spatial wavefunction-switched (SWS) structural configuration. Unlike conventional FETs, SWS devices comprise two or more asymmetric coupled quantum wells (QWs). This feature enables carrier transfer vertically from one quantum well to another or laterally to the wells of adjacent SWS-FET devices by manipulation of the gate voltages (V _g). Observation of an extra peak (near both accumulation and inversion regions) in the capacitance–voltage data in an InGaAs-AlInAs two-quantum-well SWS structure is presented as evidence of spatial switching. The peaks are attributed to the appearance of carriers first in the lower well and subsequently their transfer to the upper well as the gate voltage is increased. The electrical characteristics of a fabricated SWS InGaAs FET are also presented along with simulations of capacitance–voltage (C–V) behavior, showing the effect of wavefunction switching between wells. Finally, logic operations involving simultaneous processing of multiple bits in a device, using coded spatial location of carriers in quantum well channels, are also described.     

Fabrication and Circuit Modeling of NMOS Inverter Basedon Quantum Dot Gate Field-Effect Transistors

This paper presents the fabrication of a negative-channel metal–oxide–semiconductor (NMOS) inverter based on quantum dot gate field-effect transistors (QDG-FETs). A QDG-FET produces one intermediate state in its transfer characteristic. NMOS inverters based on a QDG-FET produce three states in their transfer characteristic. The generation of the third state in the inverter characteristic makes this a promising circuit element for multivalued logic implementation. A circuit simulation result based on the Berkley simulation (BSIM) circuit model of the QDG-FET is also presented in this paper, predicting the fabricated device characteristic.     

A Dynamic Inertial Weight Strategy in Micro PSO for Swarm Robots

Wireless Personal Communications - A relatively new area of research and development is Swarm Robotics. It is a part of the swarm intelligence field. In the proposed paper, we shall use swarm...     

Analysis of ATPMOS configurations-based 4 × 1 multiplexer with estimation of power and delay

In this article, two consecutive augmenting transistor P-channel metal oxide semiconductor (ATPMOS) configurations are proposed. These two ATPMOS configurations (ST ATPMOS and DT ATPMOS) are implemented on a 4 × 1 (multiplexer) mux circuit. Leakage power dissipation, dynamic power dissipation and delay performance parameters are calculated for both (ST ATPMOS and DT ATPMOS) ATPMOS configurations-based 4 × 1 mux circuits at different values of transistor’s width. Due to simulation, it is realised that the leakage power dissipation and dynamic power dissipation are reduced and delay is improved (delay is reduced) in the DT ATPMOS configuration-based mux circuit compared to the ST ATPMOS configuration-based mux circuit. The whole simulation process was carried out in 45-nm technology. The circuits were operated at 1-V power supply.     

Estimating architectural resources and performance for high-levelsynthesis applications

The authors present a solution to the following problems related to architectural synthesis. (1) Given an input specification and a performance constraint, determine a lower bound number of resources (active and interconnect) required to execute the data flow graph while satisfying the performance constraint. (2) Determine a lower bound performance for executing an input specification for a given number of resources (active and interconnect). These bounds are close to the actual designs synthesized by several existing systems