The JDTDOA algorithm applied to signal recovery: a performance analysis

This article suggests a novel method to retrieve a narrowband signal sent in a multipath environment with a delay spread considering ISI between symbols. The proposed method does not require any preamble nor known signal. Using the joint direction and time delay of arrivals estimation algorithm developed in prior work, the directions and time delays of arrival in the multipath channel are jointly estimated and associated while keeping a low computational cost. In this process, a MVDR beamformed copy of each arriving signal is created. The quality of these “pseudo copies” is evaluated and compared to the original direct and reflected signals in this work. Another beamforming method, the Moore–Penrose pseudoinverse, with better retrieval of the direct and reflected signals is also proposed. Using a simple delay-and-sum operation on the previously beamformed copies, it is possible to substantially improve the the system’s performance in terms of bit error rate. An approach using oversampling on the array antenna is introduced to improve performance. Numerical simulations are discussed to support theory.     

Bounded Tamper Resilience: How to Go Beyond the Algebraic Barrier

Related key attacks (RKAs) are powerful cryptanalytic attacks where an adversary can change the secret key and observe the effect of such changes at the output. The state of the art in RKA security protects against an a-priori unbounded number of certain algebraic induced key relations, e.g., affine functions or polynomials of bounded degree. In this work, we show that it is possible to go beyond the algebraic barrier and achieve security against arbitrary key relations, by restricting the number of tampering queries the adversary is allowed to ask for. The latter restriction is necessary in case of arbitrary key relations, as otherwise a generic attack of Gennaro et al. (TCC 2004) shows how to recover the key of almost any cryptographic primitive. We describe our contributions in more detail below. (1) We show that standard ID and signature schemes constructed from a large class of \(\Sigma \)-protocols (including the Okamoto scheme, for instance) are secure even if the adversary can arbitrarily tamper with the prover’s state a bounded number of times and obtain some bounded amount of leakage. Interestingly, for the Okamoto scheme we can allow also independent tampering with the public parameters. (2) We show a bounded tamper and leakage resilient CCA-secure public key cryptosystem based on the DDH assumption. We first define a weaker CCA-like security notion that we can instantiate based on DDH, and then we give a general compiler that yields CCA security with tamper and leakage resilience. This requires a public tamper-proof common reference string. (3) Finally, we explain how to boost bounded tampering and leakage resilience [as in (1) and (2) above] to continuous tampering and leakage resilience, in the so-called floppy model where each user has a personal hardware token (containing leak- and tamper-free information) which can be used to refresh the secret key. We believe that bounded tampering is a meaningful and interesting alternative to avoid known impossibility results and can provide important insights into the security of existing standard cryptographic schemes.     

AN ENHANCEMENT SCHEME OF TCP PROTOCOL IN MOBILE AD HOC NETWORKS： MME-TCP

Transmission Control Protocol （TCP） optimization in Mobile Ad hoc NETworks （MANETs） is a challenging issue because of some unique characteristics of MANETs. In this paper, a new end-to-end mechanism based on multiple metrics measurement is proposed to improve TCP performance in MANETs. Multi-metric Measurement based Enhancement of TCP （MME-TCP） designs the metrics and the identification algorithm according to the characteristics of MANETs and the experiment results. Furthermore, these metrics are measured at the sender node to reduce the overhead of control information over networks. Simulation results show that MME-TCP mechanism achieves a significant performance improvement over standard TCP in MANETs.     

DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT

First the research is conducted on the design of the two-phase sinusoidal power clock generator in this paper. Then the design of the new adiabatic logic circuit adopting the two-phase sinusoidal power clocks--Clocked Transmission Gate Adiabatic Logic （CTGAL） circuit is presented. This circuit makes use of the clocked transmission gates to sample the input signals, then the output loads are charged and discharged in a fully adiabatic manner by using bootstrapped N-Channel Metal Oxide Semiconductor （NMOS） and Complementary Metal Oxide Semiconductor （CMOS） latch structure. Finally, with the parameters of Taiwan Semiconductor Manufacturing Company （TSMC） 0.25um CMOS device, the transient energy consumption of CTGAL, Bootstrap Charge-Recovery Logic （BCRL） and Pass-transistor Adiabatic Logic （PAL） including their clock generators is simulated. The simulation result indicates that CTGAL circuit has the characteristic of remarkably low energy consumption.     

Thermoelectric Properties of NaCo<Subscript>2–<Emphasis Type="Italic">x</Emphasis></Subscript>Fe<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript>O<Subscript><Emphasis Type="Italic">y</Emphasis></Subscript>

NaCo₂O₄ has one of the highest figures of merit among all ceramic thermoelectric materials. Because of its large thermopower and low resistivity, the ceramic oxide NaCo₂O₄ is a promising candidate for potential thermoelectric applications. NaCo₂O₄ is, moreover, a ceramic compound with high decomposition temperature and chemical stability in air and it does not contain any toxic elements. Like all 3-d transition ions, Co ions have multiple spin and oxidation states. In this investigation, thermopower and electrical conductivity of NaCo₂O₄ as a function of substitution of Co by Fe ions were measured. Fe substitution for Co causes resistivity to increase, whereas the Seebeck coefficient remained nearly invariant, especially above 330 K. An erratum to this article can be found at     

Familiar/unfamiliar face classification from EEG signals by utilizing pairwise distant channels and distinctive time interval

The aim of the study is to classify single trial electroencephalogram and to estimate active regions/locations on skull in unfamiliar/familiar face recognition task. For this purpose, electroencephalographic signals were acquired from ten subjects in different sessions. Sixty-one familiar and fifty-nine unfamiliar face stimuli were shown to the subjects in the experiments. Since channel responses are different for familiar and unfamiliar classes, the channels discriminating the classes were investigated. To do so, three distances and four similarity measures were employed to assess the most distant channel pairs between familiar and unfamiliar classes for a 1-s time duration; 0.6 s from the stimulus to 1.6 s in a channel selection process. It is experimentally observed that this time interval is maintaining the greatest distance between two categories. The electroencephalographic signals were classified using the determined channels and time interval to measure accuracy. The best classification accuracy was 81.30% and was obtained with the Pearson correlation as channel selection method. The most discriminative channel pairs were selected from prefrontal regions.     

A Class of Sequential Blind Source Separation Method in Order Using Swarm Optimization Algorithm

We consider the problem of sequential, blind source separation in some specific order from a mixture of sub- and sup-Gaussian sources. Three methods of separation are developed, specifically, kurtosis maximization using (a) particle swarm optimization, (b) differential evolution, and (c) artificial bee colony algorithm, all of which produce the separation in decreasing order of the absolute kurtosis based on the maximization of the kurtosis cost function. The validity of the methods was confirmed through simulation. Moreover, compared with other conventional methods, the proposed method separated the various sources with greater accuracy. Finally, we performed a real-world experiment to separate electroencephalogram (EEG) signals from a super-determined mixture with Gaussian noise. Whereas the conventional methods separate simultaneously EEG signals of interest along with noise, the result of this example shows the proposed methods recover from the outset solely those EEG signals of interest. This feature will be of benefit in many practical applications.     

CaPPS: cache partitioning with partial sharing for multi-core embedded systems

As the number of cores in chip multi-processor systems increases, the contention over shared last-level cache (LLC) resources increases, thus making LLC optimization critical, especially for embedded systems with strict area/energy/power constraints. We propose cache partitioning with partial sharing (CaPPS), which reduces LLC contention using cache partitioning and improves utilization with sharing configuration. Sharing configuration enables the partitions to be privately allocated to a single core, partially shared with a subset of cores, or fully shared with all cores based on the co-executing applications’ requirements. CaPPS imposes low hardware overhead and affords an extensive design space to increase optimization potential. To facilitate fast design space exploration, we develop an analytical model to quickly estimate the miss rates of all CaPPS configurations using the applications’ isolated LLC access traces to predict runtime LLC contention. Experimental results demonstrate that the analytical model estimates cache miss rates with an average error of only 0.73 % and with an average speedup of \(3505\times \) as compared to a cycle-accurate simulator. Due to CaPPS’s extensive design space, CaPPS can reduce the average LLC miss rate by as much as 25 % as compared to baseline configurations and as much as 14–17 % as compared to prior works.     

A Power Efficient Test Data Compression Method for SoC using Alternating Statistical Run-Length Coding

A power efficient System-on-a-Chip test data compression method using alternating statistical run-length coding is proposed. To effectively reduce test power dissipation, the test set is firstly preprocessed by 2D reordering scheme. To further improve the compression ratio, 4 m partitioning of the runs and a smart filling of the don’t care bits provide the nice results, and alternating statistical run-length coding scheme is developed to encode the preprocessed test set. In addition, a simple decoder is obtained which consumed a little area overhead. The benchmark circuits verify the proposed power efficient coding method well. Experimental results show it obtains a high compression ratio, low scan-in test power dissipation and little extra area overhead during System-on-a-Chip scan testing.