Visualization of Ethereum P2P network topology and peer properties

Ethereum is arguably the second most popular cryptocurrency-based network after Bitcoin. Both use the distributed ledger technology known as the blockchain, which is considered secure. However, the provided security level is proportional to the number of connected nodes, the number of influential nodes, and the supported amount of hash power. Thus, the knowledge of the network properties and nodes' behavior is helpful to protect the network from possible attacks such as double-spending attacks, DDoS attacks, 51% attacks, and Sybil attacks. This paper proposes a node discovery mechanism, which performs a P2P link discovery on the Ethereum main network. For that, we develop Search-node, a modified version of Ethereum client that searches for all participating nodes in the blockchain network, stores the node information in the Bucket, and then processes the peer discovery method. Based on the collected data, we first visualize the Ethereum network topology and analyze the attributes of the network such as node degree, path length, diameter, and clustering coefficient. We then analyze the node properties and provide analytical results regarding the relationship between nodes, heavily connected nodes, node geo-distribution, security issues, and possible attacks over the influential nodes. As a result, we have identified 68,406 nodes with a total of 642,034 edges. By analyzing the collected data, we have found that the diameter in the Ethereum network is equal to 8. The node degree is over 19, which is two times higher than the default configuration.     

Realization of multigigabit channel equalization and crosstalk cancellation integrated circuits

In this paper, we present integrated circuit solutions that enable high-speed data transmission over legacy systems such as short reach optics and electrical backplanes. These circuits compensate for the most critical signal impairments, intersymbol interference and crosstalk. The finite impulse response (FIR) filter is the cornerstone of our architecture, and in this study we present 5- and 10-Gsym/s FIR filters in 2-/spl mu/m GaAs HBTs and 0.18-/spl mu/m CMOS, respectively. The GaAs FIR filter is used in conjunction with spectrally efficient four-level pulse-amplitude modulation to demonstrate 10-Gb/s data throughput over 150 m of 500 MHz/spl middot/km multimode fiber. The same filter is also used to demonstrate equalization and crosstalk cancellation at 5 Gb/s on legacy backplane. The crosstalk canceller improves the bit error rate by five orders of magnitude. Furthermore, our CMOS FIR filter is tested and demonstrates backplane channel equalization at 10 Gb/s. Finally, building blocks for crosstalk cancellation at 10 Gb/s are implemented in a 0.18-/spl mu/m CMOS process. These circuits will enable 10-Gb/s data rates on legacy systems.     

Model of Precipitation Hardening of Al – Mg – Si Alloys Under Aging

Metal Science and Heat Treatment - A model of precipitation hardening of an Al – Mg – Si alloy due to precipitation of several phases formed under different aging conditions is...     

Fabrication, structural and electrical characterization of VO2 nanowires

The structural and electrical properties of VO₂ nanowires synthesized on Si₃N₄/Si substrates or molybdenum grids by a catalyst-free vapour transport method were investigated. The grown VO₂ nanowires are single crystalline and rectangular-shaped with a preferential axial growth direction of [1 0 0], as examined with various structural analyses such as transmission electron microscopy, electron diffraction, X-ray diffraction, and X-ray photoelectron spectroscopy. In particular, it was found that growing VO₂ nanowires directly on Si₃N₄ deposited molybdenum transmission electron microscopy grids is advantageous for direct transmission electron microscopy and electron diffraction characterizations, because it does not involve a nanowire-detachment step from the substrates that may cause chemical residue contamination. In addition to structural analyses, VO₂ nanowires were also fabricated into field effect transistor devices to characterize their electrical properties. The transistor characteristics and metal-insulator transition effects of VO₂ nanowires were investigated.     

On-chip deposition of carbon nanotubes using CMOS microhotplates

The direct deposition of carbon nanotubes on CMOS microhotplates is demonstrated in this paper. Tungsten microhotplates, fabricated on thin SOI membranes aside CMOS control circuitry, are used to locally grow carbon nanotubes by chemical vapour deposition. Unlike bulk heating of the entire chip, which could cause degradation to CMOS devices and interconnects due to high growth temperatures in excess of 500?°C, this novel technique allows carbon nanotubes to be grown on-chip in localized regions. The microfabricated heaters are thermally isolated from the rest of the CMOS chip as they are on the membranes. This allows carbon nanotubes to be grown alongside CMOS circuitry on the same wafer without any external heating, thus enabling new applications (e.g.?smart gas sensing) where the integration of CMOS and carbon nanotubes is required.     

Up-Regulation of Rhoa/Rho Kinase Pathway by Translationally Controlled Tumor Protein in Vascular Smooth Muscle Cells

Translationally controlled tumor protein (TCTP), a repressor for Na,K-ATPase has been implicated in the development of systemic hypertension, as proved by TCTP-over-expressing transgenic (TCTP-TG) mice. Aorta of TCTP-TG exhibited hypercontractile response compared to that of non-transgenic mice (NTG) suggesting dys-regulation of signaling pathways involved in the vascular contractility by TCTP. Because dys-regulation of RhoA/Rho kinase pathway is implicated in increased vascular contractility, we examined whether TCTP induces alterations in RhoA pathway in vascular smooth muscle cells (VSMCs). We found that TCTP over-expression by adenovirus infection up-regulated RhoA pathway including the expression of RhoA, and its downstream signalings, phosphorylation of myosin phosphatase target protein (MYPT-1), and myosin light chain (MLC). Conversely, lentiviral silencing of TCTP reduced the RhoA expression and Rho kinase signalings. Using immunohistochemical and Western blotting studies on aortas from TCTP-TG confirmed the elevated expression of RhoA and increase in p-MLC (phosphorylated MLC). In contrast, down-regulation of RhoA and p-MLC were found in aortas from heterozygous mice with deleted allele of TCTP (TCTP^+/−). We conclude that up-regulation of TCTP induces RhoA-mediated pathway, and that TCTP-induced RhoA plays a role in the regulation in vasculature. Modulation of TCTP may offer a therapeutic target for hypertension and in vascular contractility dysfunction.     

Design and fabrication of multilayer actuator using floating electrode

PZT (lead zirconate titanate) multilayer actuators were of interest due to their small volume, fast response, low power consumption and low driving voltage. But this multilayer actuator had some problems. However, due to internal stress around electrodes, crack and delamination were very important issues. Around the edge of conventional inter-digital electrodes, non-uniform electric field generates the stress concentration, which causes the ceramic crack and delamination. The internal stress distribution in multilayer actuator was analysed by a numerical simulation. And by using float electrode, multilayer actuator was manufactured to decrease internal stress concentration of inter-digital electrode. The float electrode could suppress the electric field concentration and cracking in the actuator.

Destruction mechanism in multilayer ceramic actuators has been investigated under cyclic electric fields. Crack propagation has been observed dynamically by using optical microscopy, and the accompanying characteristic of acoustic emission was measured.     

A runtime resolution scheme for priority boost conflict in implicit coscheduling

High-performance parallel and scientific applications are composed of multiple processes running on distinct CPUs that communicate frequently. Due to the synchronization needs of such applications, performance is greatly hampered if their processes are not scheduled simultaneously on the CPUs. Implicit coscheduling (ICS) is a well-known technique to address this problem in multi-programmed clusters, however, traditional ICS schemes do not incorporate steps to adequately deal with priority boost conflicts, leading to significantly degraded performance. In this paper, we propose the use of runtime difference in contention across nodes to provide more sophisticated coscheduling decisions in response to the conflicts. We also present a novel coscheduling scheme termed PROC (Process ReOrdering-based Coscheduling) that adaptively regulates the scheduling sequence of conflicting processes based on the rescheduling latency of their correspondents in remote nodes. We perform extensive simulation-based experiments using both synthetic and realistic workloads to analyze the performance of PROC compared to alternatives such as local scheduling, a widely used batch scheduling, gang scheduling, and existing ICS schemes. The results show that all ICS schemes commonly experience priority boost conflicts, and that the proposed PROC significantly outperforms other ICS alternatives (or batch scheduling) by up to 50.4% (or 72.5%) in the average job response time. This improvement is achieved by reducing wasted idle time and spinning time without sacrificing fairness.