Estimation of failure probability from a bivariate normal stress-strength distribution

Probability (P) of equipment failure consequent upon stress exceeding built-in strength has been estimated assuming a bivariate normal stress-strength distribution. The UMVUE of P when parameters other than the means are known has been derived. An alternative estimator based on maximum likelihood estimates has been proposed in the case when all the five parameters are unknown. Asymptotic variances of both these estimators have been worked out. Some relevant numerical computations have also been reported.     

Kinematic nonuniqueness of elastoplastic structures

Lack of uniqueness of the kinematic solution of structures, analyzed as an assemblage of discretized elements assuming nonholonomic linearly-elastic/perfectly-plastic behaviour and a linearized yield surface, is studied. The occurrence of an elastoplastic mechanism leads to nonuniqueness; an elastoplastic mechanism is defined as a kinematically-admissible strain rate field made up of an admissible elastoplastic solution of the governing conditions and an add-on variable component consisting of a linear combination of plastic (collapse) mechanisms. The scalar multipliers of this linear combination are bounded, except at plastic collapse in which case the elastoplastic mechanism degenerates to a plastic mechanism. In the space of loads, the load paths that could coexist with nonuniqueness are restricted to a hyperplane or a crease of intersection of hyperplanes, defined by the equilibrium equations arising from the associated plastic mechanisms of the elastoplastic mechanism. The difference between any two competing displacement vectors would be normal to that hyperplane or crease, in the same manner plastic strain rates are to the yield surface according to the flow rule.     

Integrating design and measurement

At the 2004 International Instrumentation and Measurement Conference in Italy, a number of us were discussing the growing importance of system-level design and the implications for simulation and measurement technologies. It was puzzling to us that technology continues to increase in complexity, yet the last two decades have seen the design world of simulation and modeling diverge from the world of measurement and testing. Today's systems, whether they are commercial products or scientific experiments, require a convergence of technologies that makes performance measurement and validation not only more critical but also more prone to error. In the discussions a point that came up repeatedly was the value of bringing the design and test communities closer together, and it was suggested that it was timely to highlight this issue. With that in mind, this note aims to stimulate community discussion by first examining some benefits and challenges of integration and then outlining possible directions for collaboration between the simulation and measurement communities.     

Minimizing power dissipation in optical interconnects at low voltage using optimal modulator design

A strong motivation for insertion of optical interconnects in short-distance applications such as chip-to-chip or back-plane communication, apart from high bit rates, is their potential to achieve these bit rates at low power compared to the currently prevalent copper based interconnects. Thus, it is imperative to construct design methodologies which minimize the total optical link power dissipation. We present one such methodology, where we optimize the quantum-well modulators to minimize the power dissipation in modulator-based optical interconnects. In the first part of the paper, the focus is on obtaining the optimal modulator metrics [contrast ration (CR) and insertion loss], which yield the lowest total power (receiver and the modulator). The trends are studied as a function of the input laser power and bit rate. Having obtained the desirable modulator metrics and the corresponding power dissipation, in the second part, the focus is on the feasibility of these metrics in the light of voltage swing constraints. The biggest concern with the modulator based optical link is the low CR, especially at low voltage swing. While studying these concerns, we also provide insight into the physical design of the modulator including, its intrinsic region thickness, pre-bias voltage, and the size and the number of quantum-wells. Specifically, we outline the method to obtain the design parameters, which allows minimum power dissipation with the least laser power. This ultimately yields higher aggregate I/O bandwidth for chip to chip communication in power limited chips.     

Thermal-lens and photo-acoustic methods for the determination of SiC thermal properties

In this paper we report the use of photothermal techniques such as Thermal lens (TL) spectrometry, Photoacoustic and heat capacity, ρc_p, to determine the thermo-optical parameters, such as thermal conductivity (K), thermal diffusivity (D), specific heat (c_p) and the optical path dependence with temperature (ds/dT), of an undoped polycrystalline 3C-SiC. To our knowledge, this is the first time that Thermal lens technique is used for wide band-gap systems. Results obtained for the polycrystalline sample with TL technique indicates that ds/dT is negative at room temperature. Moreover, the obtained values of thermal diffusivity and thermal conductivity are in good agreement with that found in the literature, indicating that the phototermal techniques can be used to obtain the referred parameters in circumstances where other techniques cannot be used, for example, in harsh environments.     

High performance laser with nanopatterned active layer by selective area epitaxy

Lasers containing a nanopatterned active layer demonstrating excellent threshold characteristics are presented. The nanopatterned active layer is fabricated using high-resolution electron beam lithography and selective-area metal organic chemical vapour deposition crystal growth. Results demonstrating an order of magnitude improvement over previous results are reported.     

Low-voltage wideband compact CMOS variable gain amplifier

A novel low-voltage wideband CMOS variable gain amplifier (VGA) is proposed. Using a 0.13 /spl mu/m CMOS technology, the VGA exhibits a linear-dB controllable gain range of 40 dB with a bandwidth in excess of 130 MHz, while drawing only 50 /spl mu/A from a single 1 V power supply voltage.     

A 300-MHz 25-/spl mu/A/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor

An on-chip 1-Mb SRAM suitable for embedding in the application processor used in mobile cellular phones was developed. This SRAM supports three operating modes - high-speed active mode, low-leakage low-speed active mode, and standby mode - and uses a subdivisional power-line control (SPC) scheme. The combination of three operating modes and the SPC scheme realizes low-power operation under actual usage conditions. It operates at 300 MHz, with leakage of 25 /spl mu/A/Mb in standby mode, and 50 /spl mu/A/Mb at the low-leakage active mode. This SRAM also uses a self-bias write scheme that decreases of minimum operating voltage by about 100 mV.