首页 | 本学科首页   官方微博 | 高级检索  
文章检索
  按 检索   检索词:      
出版年份:   被引次数:   他引次数: 提示:输入*表示无穷大
  收费全文   17篇
  免费   0篇
电工技术   10篇
金属工艺   1篇
无线电   3篇
一般工业技术   2篇
自动化技术   1篇
  2013年   1篇
  2010年   1篇
  2009年   2篇
  2008年   4篇
  2007年   1篇
  2006年   3篇
  2005年   1篇
  2003年   2篇
  2002年   1篇
  1975年   1篇
排序方式: 共有17条查询结果,搜索用时 15 毫秒
11.
A self-consistent electrothermal transport model that couples electrical and thermal transport equations is established and applied to AlGaN/GaN device structures grown on the following three different substrate materials: 1) SiC; 2) Si; and 3) sapphire. Both the resultant I-V characteristics and surface temperatures are compared to experimental I -V measurements and Raman spectroscopy temperature measurements. The very consistent agreement between measurements and simulations confirms the validity of the model and its numerical rendition. The results explain why the current saturation in measured I-V characteristics occurs at a much lower electric field than that for the saturation of electron drift velocity. The marked difference in saturated current levels for AlGaN/GaN structures on SiC, Si, and sapphire substrates is directly related to the different self-heating levels that resulted from the different biasing conditions and the distinctive substrate materials.  相似文献   
12.
Implant free MOSFETs take advantage of the high mobility in III–V materials to allow operation at very high speed and low power. However, as with conventional silicon devices, they will be susceptible to intrinsic parameter fluctuations due to random discrete doping. In this paper, we investigate the impact of random discrete dopants induced fluctuations in the δ-doping layer on the threshold voltage of the 30 nm gate length implant free III–V MOSFET.  相似文献   
13.
The intrinsic parameter fluctuations associated with the discreteness of charge and matter become an important factor when the semiconductor devices are scaled to nanometre dimensions. The interface charge in the recess regions of high electron mobility transistors (HEMTs) has a considerable effect on the overall device performance. We have employed a 3D parallel drift-diffusion device simulator to study the impact of interface charge fluctuations on the I-V characteristics of nanometre HEMTs. For this purpose, two devices have been analysed, a 120 nm gate length pseudomorphic HEMT with an In0.2Ga0.8As channel and a 50 nm gate length InP HEMT with an In0.7Ga0.3As channel.  相似文献   
14.
Fluctuations caused by discreteness of charge will play an important role when devices are scaled to gate lengths approaching nanometer dimensions. In this paper, we use a 3D drift-diffusion simulator to study an influence of discrete random dopant charges in the delta doping layer of a 50 nm gate length InP high electron mobility transistor.  相似文献   
15.
16.
The effective potential approach which can represent quantum mechanical (QM) confinement at a heterointerface has been incorporated into our Monte Carlo device simulator MC/H2F. The simulator is used to investigate the impact of the quantum corrections on the performance of single and double -doped pseudomorphic high electron mobility transistors scaled to decanano dimensions. The QM confinement in the device channel results in reduction of the drive current and the device transconductance. Its influence increases with the device scaling from 120 to 30 nm gate length and also with increasing the carrier sheet density in the double -doped structures.  相似文献   
17.
Novel thin-body architectures with complex geometry are becoming of large interest because they are expected to deliver the ITRS prescribed on-current when semiconductor transistors are scaled into nanometer dimensions. We report on the development of a 3D parallel Monte Carlo simulator coupled to a finite element solver for the Poisson equation in order to correctly describe the complex domains of advanced FinFET transistors. We study issues such as charge assignment, field calculation, treatment of contacts and parallelisation approach which have to be taken into account when using tetrahedral elements. The applicability of the simulator is demonstrated by modelling a 10 nm gate length double gate MOSFET with a body thickness of 6.1 nm.  相似文献   
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号