Heat transfer augmentation in 3D internally finned and microfinned helical tube

Experiments are performed to investigate the single-phase flow and flow-boiling heat transfer augmentation in 3D internally finned and micro-finned helical tubes. The tests for single-phase flow heat transfer augmentation are carried out in helical tubes with a curvature of 0.0663 and a length of 1.15 m, and the examined range of the Reynolds number varies from 1000 to 8500. Within the applied range of Reynolds number, compared with the smooth helical tube, the average heat transfer augmentation ratio for the two finned tubes is 71% and 103%, but associated with a flow resistance increase of 90% and 140%, respectively. A higher fin height gives a higher heat transfer rate and a larger friction flow resistance. The tests for flow-boiling heat transfer are carried out in 3D internally micro-finned helical tube with a curvature of 0.0605 and a length of 0.668 m. Compared with that in the smooth helical tube, the boiling heat transfer coefficient in the 3D internally micro-finned helical tube is increased by 40-120% under varied mass flow rate and wall heat flux conditions, meanwhile, the flow resistance is increased by 18-119%, respectively.     

A smart exponential‐threshold‐linear backoff mechanism for IEEE 802.11 WLANs

Based on the standardized IEEE 802.11 Distributed Coordination Function (DCF) protocol, this paper proposes a new backoff mechanism, called Smart Exponential‐Threshold‐Linear (SETL) Backoff Mechanism, to enhance the system performance of contention‐based wireless networks. In the IEEE 802.11 DCF scheme, the smaller contention window (CW) will increase the collision probability, but the larger CW will delay the transmission. Hence, in the proposed SETL scheme, a threshold is set to determine the behavior of CW after each transmission. When the CW is smaller than the threshold, the CW of a competing station is exponentially adjusted to lower collision probability. Conversely, if the CW is larger than the threshold, the CW size is tuned linearly to prevent large transmission delay. Through extensive simulations, the results show that the proposed SETL scheme provides a better system throughput and lower collision rate in both light and heavy network loads than the related backoff algorithm schemes, including Binary Exponential Backoff (BEB), Exponential Increase Exponential Decrease (EIED) and Linear Increase Linear Decrease (LILD). Copyright © 2011 John Wiley & Sons, Ltd.     

Optical configuration for unpolarized ultra-long-range surface-plasmon-polariton waves

Multilayered structures were designed on both sides of a thin silver film to let both transverse-magnetic- and transverse-electric-polarized electromagnetic waves propagate along a thin metal film simultaneously in the same configuration, as so-called long-range surface-plasmon-polariton (LRSPP) waves. Based on the admittance analysis and design, the propagation length of an unpolarized LRSPP wave can be extended by more than 1 order of magnitude compared with previous results.     

Low operational voltage and high performance organic field effect memory transistor with solution processed graphene oxide charge storage media

Low voltage organic field effect memory transistors are demonstrated by adapting a hybrid gate dielectric and a solution processed graphene oxide charge trap layer. The hybrid gate dielectric is composed of aluminum oxide (AlO_x) and [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) plays an important role of both preventing leakage current from gate electrode and providing an appropriate surface energy to allow for uniform spin-casting of graphene oxide (GO). The hybrid gate dielectric has a breakdown voltage greater than 6 V and capacitance of 0.47 μF/cm². Graphene oxide charge trap layer is spin-cast on top of the hybrid dielectric and has a resulting thickness of approximately 9 nm. The final device structure is Au/Pentacene/PMMA/GO/PhO-19-PA/AlO_x/Al. The memory transistors clearly showed a large hysteresis with a memory window of around 2 V under an applied gate bias from 4 V to −5 V. The stored charge within the graphene oxide charge trap layer was measured to be 2.9 × 10¹² cm⁻². The low voltage memory transistor operated well under constant applied gate voltage and time with varying programming times (pulse duration) and voltage pulses (pulse amplitude). In addition, the drain current (I_ds) after programming and erasing remained in their pristine state after 10⁴ s and are expected to be retained for more than one year.     

Systematic Doping Control of CVD Graphene Transistors with Functionalized Aromatic Self‐Assembled Monolayers

Recent reports have shown that self‐assembled monolayers (SAMs) can induce doping effects in graphene transistors. However, a lack of understanding persists surrounding the quantitative relationship between SAM molecular design and its effects on graphene. In order to facilitate the fabrication of next‐generation graphene‐based devices it is important to reliably and predictably control the properties of graphene without negatively impacting its intrinsic high performance. In this study, SAMs with varying dipole magnitudes/directions are utilized and these values are directly correlated to changes in performance seen in graphene transistors. It is found that, by knowing the z‐component of the SAM dipole, one can reliably predict the shift in graphene charge neutrality point after taking into account the influence of the metal electrodes (which also play a role in doping graphene). This relationship is verified through density functional theory and comprehensive device studies utilizing atomic force microscopy, X‐ray photoelectron spectroscopy, Raman spectroscopy, and electrical characterization of graphene transistors. It is shown that properties of graphene transistors can be predictably controlled with SAMs when considering the total doping environment. Additionally, it is found that methylthio‐terminated SAMs strongly interact with graphene allowing for a cleaner graphene transfer and enhanced charge mobility.     

Mesostructured Arrays of Nanometer‐spaced Gold Nanoparticles for Ultrahigh Number Density of SERS Hot Spots

A novel one‐trough synthesis via an air‐water interface is demonstrated to provide hexagonally packed arrays of densely spaced metallic nanoparticles (NPs). In the synthesis, a mesostructured polyoxometalate (POM)‐silicatropic template (PSS) is first self‐assembled at the air‐water interface; upon UV irradiation, anion exchange cycles enable the free‐floating PSS film to continuously uptake gold precursors from the solution subphase for diffusion‐controlled and POM‐site‐directed photoreduction inside the silica channels. NPs ≈ 2 nm can hence be homogeneously formed inside the silica‐surfactant channels until saturation. As revealed via X‐ray diffraction, small‐angle X‐ray scattering (SAXS), grazing incidence SAXS, and transmission electron microscopy, the Au NPs directed by the PSS template are arrayed into a 2D hexagonal lattice with inter‐channel spacing of 3.2 nm and a mean along‐channel NP spacing of 2.8 nm. This corresponds to an ultra‐high number density (≈10¹⁹ NPs cm^?3) of narrowly spaced Au NPs in the Au‐NP@PSS composite, leading to 3D densely deployed hot‐spots along and across the mesostructured POM‐silica channels for surface‐enhanced Raman scattering (SERS). Consequently, the Au‐NP@PSS composite exhibits prominent SERS with 4‐mercaptobenzoic acid (4‐MBA) adsorbed onto Au NPs. The best 4‐MBA detection limit is 5 nm , with corresponding SERS enhancement factors above 10⁸.     

A source authentication scheme based on message recovery digital signature for multicast

The source authentication is an important issue for the multicast applications because it can let the receiver know whether the multicast message is sent from a legal source or not. However, the previously related schemes did not provide the confidentiality for data packets. In addition, the communication costs of these schemes are still high for real‐time applications in the multicast environments. To solve the aforementioned problems, we propose a new source authentication scheme based on message recovery signature for multicast in this paper. In the proposed scheme, the encrypted data can be embedded in the digital signature, so the communication loads can be greatly reduced. In addition, the digital signature contains the encrypted data, and thus the confidentiality of data packets can be well protected. According to the aforementioned advantages, the proposed scheme is securer and more efficient than the related works for the real‐time applications. Copyright © 2013 John Wiley & Sons, Ltd.     

Performance and reliability of poly-Si TFTs on FSG buffer layer

A novel and process-compatible scheme for fabricating poly-Si thin-film transistors (TFTs) on an FSG buffer layer was proposed and demonstrated. Experimental results reveal that remarkably improved device performance and uniformity can be achieved with appropriate fluorine concentration. The poly-Si TFTs fabricated on FSG layers have a higher on-current, a lower leakage current, and a higher field-effect mobility compared with the conventional poly-Si TFTs. Furthermore, the incorporation of fluorine also increased the reliability of poly-Si TFTs against hot carrier stressing, which is attributed to the formation of Si-F bonds.