An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization

Advanced nanometer technologies have led to a drastic increase in operational frequencies resulting in the performance of circuits becoming increasingly vulnerable to timing variations. The increasing process spread in advanced nanometer nodes poses considerable challenges in predicting post-fabrication silicon performance from timing models. Thus, there is a great need to qualify basic building structures on silicon in terms of critical parameters before they could be integrated within a complex System-on-Chip (SoC). The work of this paper presents a configurable circuit and an associated power-aware at-speed test methodology for the purpose of qualifying basic standard cells and complex IP structures to detect the presence of timing faults. Our design has been embedded within test-chips used for the development of the 28 nm Fully Depleted Silicon On Insulator (FD-SOI) technology node. The relevant silicon results and analysis validate the proposed power-aware test methodology for qualification and characterization of IPs and provide deeper insights for process improvements.     

Certain Investigation on Healthcare Monitoring for Enhancing Data Transmission in WSN

International Journal of Wireless Information Networks - Wireless Sensor Networks are often to perform autonomous sensing and controlling the real world objects through the sensor nodes across the...     

Bandwidth Improvement of Stub Loaded Compact Ultra-Wideband Microstrip Patch Antenna for C/X-Band Applications

Wireless Personal Communications - Authentication is a term very important for data communication security. We see many frauds due to authentication failure. The problem manifolds when...     

High Frequency Electronically Tunable Floating Memristor Emulators employing VDGA and Grounded Capacitor

This paper introduces novel electronically tunable floating and grounded memristor emulator circuits using voltage differencing gain amplifier and one capacitor. The decremental and incremental memristor emulators have been suggested for both floating as well as grounded type configurations. Decremental to incremental and incremental to decremental configurations of memristor emulators can be easily obtained. The fingerprint of memristor is the pinched hysteresis loops that are maintained for the significant range of frequencies from 5 kHz to 1 MHz. The proposed memristor emulator sustains its range of frequency for both grounded and floating configurations. The simulations have been done in Eldo simulation tool of Mentor Graphics using TSMC 0.18 µm complementary metal-oxide semiconductor (CMOS) technology parameters. The proposed electronically tunable memristor emulators are used to realize analog filters in view of performance verification.

     

An efficient and intelligent routing strategy for vehicular delay tolerant networks

The vehicular delay-tolerant network is the real-life application based area of Delay tolerant network where communication takes place using vehicular nodes and roadside units. The topology used in vehicular networks is highly dynamic by architecture due to the use of moving vehicular nodes. It operates in such a scenario where a direct path between source and destination remains absent on the most piece of the time. In case of non-existence of connected path vehicular delay-tolerant network works opportunistically and uses the same store, carry, and forward paradigm as Delay Tolerant Network. However, the routing protocols designed for vehicular delay-tolerant network faces crucial challenges like inadequate relay node, incomplete data transfer, a large number of packet drop, and uncertain delivery time. In this research paper, we propose a novel routing strategy for the vehicular delay-tolerant network. The proposed routing strategy selects efficient vehicular relay node for complete packet transfer and intelligently reduces the packet drop for timely packet delivery. We implement the proposed routing strategy in the ONE simulator; the ONE simulator provides an opportunistic environment for nodes. We analyze the performance of the proposed strategy under various simulations results using different parameters. The results show that the proposed strategy outperforms standard routing protocols in terms of considered parameters and provide an efficient solution for the problem of disconnection.

     

Enhancing the isolation between the strips of dipoles antenna at terahertz frequency with cuboid-shaped graphene layer

Wireless Networks - In this paper, the concept of mantle cloaking method uses to enhance the isolation between the two electrically close dipole antenna at low-terahertz (THz) frequencies, two...     

Survey of Deep-Learning Techniques in Big-Data Analytics

Big-data research studies relying upon Deep-learning methods are revitalized the decision-making mechanism in the business sectors and the enterprise domains. The firms’ operational parameters also have the dependency of the Big-data analytics phase, their way of managing the data, and to evolve the outcomes of Big-data implementation by using the Deep-learning algorithms. Deep-learning approaches enhancements in Big-data applications facilitate the decision-making process such as the information-processing to the employees, analytical potentials augmentation, and in the transition of more innovative work. In this DL-approach, the robust-patterns of the data-predictions resulted from the unstructured information by conceptualizing the Decision-making methods. Hence this paper reviewed the impact of the Deep-learning process utilizing the Big-data in the enterprise and Business sectors. Also this study provides a comprehensive survey of all the Deep-learning techniques illustrating the efficiency of Big-Data processing and their impacts of operational parameters. Further it concentrating the data-dimensionality factors and the Big-data complications rectifying by utilizing the DL-algorithms, usage of Machine-learning or deep-learning process for the decision-making mechanism in the Enterprise sectors and business sectors. This research discussed the predictions of the Big-data analytics resulting to the decision parameters within the organisations, and in the management of larger scale of datasets in Big-data analytics processing by utilizing the Deep-learning implementations. The comparative analysis of the reviewed studies has also been described by comparing existing approaches of Deep-learning methodologies in employing Big-data analytics.

     

Optical backbone and control of attocell network

Photonic Network Communications - For serving futuristic applications like distributed robotic systems with robots equipped with humanoid intelligence, wireless access to high-performance computing...     

A circularly polarized printed elliptical wide-slot antenna with high bandwidth-dimension-ratio for wireless applications

Wireless Networks - This paper outlines a simple design of a compact wideband microstrip-line fed antenna having two rotated elliptical wide-slots (EWSs). Here, both the elliptical wide-slots are...