A BiCMOS dynamic multiplier using Wallace tree reductionarchitecture and 1.5-V full-swing BiCMOS dynamic logic circuit

The authors present a BiCMOS dynamic multiplier, which is free from race and charge-sharing problems, using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit. Based on a 1-μm BiCMOS technology, a 1.5-V 8×8 multiplier designed, shows a 2.3× improvement in speed as compared to the CMOS static one     

High-Temperature Stability of 650-nm Resonant-Cavity Light-Emitting Diodes Fabricated Using Wafer-Bonding Technique on Silicon Substrates

AlGalnP-based visible 650-nm GalnP-AlGalnP resonant-cavity light-emitting diodes (RCLEDs) with high-temperature stability were fabricated by wafer-bonding techniques on Si substrates. In this study, the metal-bonding RCLEDs (MBRCLEDs) devices were designed with 84-mum apertures for light output. The MBRCLEDs with a maximum wall-plug efficiency of 13.7% were demonstrated at an injection current of 2.5 mA. In addition, the improved heat sinking of MBRCLEDs led to lower junction temperature, and resulted in a very low power decay of 0.31 dB from room temperature to 100degC at an injection current of 20 mA.     

Technologies and the development of the Automated Metadata Indexing and Analysis (AMIA) system

The Automated Metadata Indexing and Analysis (AMIA) project aims to provide an effective digital asset management (DAM) tool for large digital asset databases. We began with text-based indexing since it is still the most reliable approach as compared with other content-based media features. AMIA not only searches for the text of the file name, but also utilizes embedded information such as the metadata in Maya files. The AMIA system builds a linked map between all dependency files. We present an approach of preserving previously established metadata created by the old DAM tools, such as AlienBrain, and integrating them into the new system. Findings indicate that AMIA has significantly improved search performance comparing to previous DAM tools. Finally, the ongoing and future work in the AMIA project is described.     

Enhancing the Light Extraction of (Alx Ga1 − x) 0.5In0.5P-Based Light-Emitting Diode Fabricated via Geometric Sapphire Shaping

AlGaInP-based light-emitting diodes (LEDs) with a transparent sapphire substrate were fabricated by the glue-bonding (GB) method. This transparent sapphire substrate is a geometric shaping structure by wet etching processes. Furthermore, the n-side-up surface has a nano-roughened texture by natural mask and chemical wet etching processes. The light output of this novel LED structure could be enhanced about 26.7% (at 350 mA) due to the higher light extraction as compared with the conventional GB-LEDs.     

A Novel Integrated Multistage 2-D MEMS Optical Switch With Spanke–Benes Architecture

Due to the emergence of high-capacity wavelength-division multiplexing transmission systems, new optical cross-connect (OXC) architectures that make a large number of fiber/wavelength counts to switch the signal in the optical domain are needed. Optical microelectromechanical system (MEMS) switches are regarded as the most promising optical switch technology to achieve such functionalities. In this paper, we propose a novel integrated multistage two-dimensional (2-D) MEMS optical switch design with Spanke-Benes architecture and compare it with the conventional crossbar architecture, the L-switching architecture, and Shuffle-Benes architecture. Our proposed architecture is very suitable for building large-port-count 2-D MEMS switches and achieves much better performance in terms of beam divergence loss, longest optical path, mirror radius, substrate size, port-to-port repeatability, and power consumption than the other three architectures. Furthermore, compared with the 2-D conventional crossbar switch commercially available now, the proposed architecture can save 50% mirrors, shorten 87.5% longest optical path, minify 65% mirror radius, and shrink 90% substrate size.     

The effects of substrate bias,substrate temperature,and pulse frequency on the microstructures of chromium nitride coatings deposited by pulsed direct current reactive magnetron sputtering

Recently, great attention has been devoted to the pulsed direct current (DC) reactive magnetron sputtering technique, due to its ability to reduce arcing and target poisoning, and its capability of producing insulating thin films. In this study, chromium nitride (CrN) coatings were deposited by the bipolar symmetric pulsed DC magnetron reactive sputtering process at different pulse frequency, substrate bias voltage, and the substrate temperature. It was observed that the texture of CrN changed from (111) to (200) as substrate temperature increased to 300°C as deposited at 2 kHz without substrate bias. With increasing pulsing bias and pulse frequency of target, predominated (200) orientation of CrN film was shown due to the ion bombardment/channeling effect to preferentially sputter those unaligned planes. For the CrN coatings deposited with pulsed biasing, the grain size decreased with increasing pulse frequency and substrate bias, whereas the surface roughness showed a reverse trend. The deposition rate of the CrN films decreased with increasing pulse frequency. It was concluded that the pulse frequency, substrate bias, and substrate temperature played important role in the texture, microstructure, and surface roughness of the CrN coatings deposited by the pulsed DC magnetron sputtering process.     

Tunable Parametric All-Fiber Short-Wavelength IR Transmitter

In this paper, the performance of an all-fiber short-wave IR (SWIR) transmitter with wideband tunability and high peak power is reported. Transmitter construction relied on parametric process in highly nonlinear fiber to convert a seed laser at 1260 nm to 2155 nm SWIR channel with record 39 dB efficiency and translation over 900 nm spectral range. We demonstrated 61 W of peak converted power at 2 $mu$m and 26 W at 2.15 $mu$ m. Efficient conversion was made possible by engineered fourth-order dispersion of the highly nonlinear fiber and construction of a low-noise pump source in a 1550 nm band.      

Reduced-rank multistage receivers for DS-CDMA in frequency-selective fading channels

Multistage (MS) implementation of the minimum mean-square error (MMSE), minimum output energy (MOE), best linear unbiased estimation (BLUE), and maximum-likelihood (ML) filter banks (FBs) is developed based on the concept of the MS Wiener filtering (MSWF) introduced by Goldstein et al. These FBs are shown to share a common MS structure for interference suppression, modulo a distinctive scaling matrix at each filter's output. Based on this finding, a framework is proposed for joint channel estimation and multiuser detection (MUD) in frequency-selective fading channels. Adaptive reduced-rank equal gain combining (EGC) schemes for this family of FBs (MMSE, MOE, BLUE, and ML) are proposed for noncoherent blind MUD of direct-sequence code-division multiple-access systems, and contrasted with the maximal ratio combining counterparts that are also formed with the proposed common structure under the assumption of known channel-state information. The bit-error rate, steady-state output signal-to-interference plus noise ratio (SINR), and convergence of the output SINRs are investigated via computer simulation. Simulation results indicate that the output SINRs attain full-rank performance with much lower rank for a highly loaded system, and that the adaptive reduced-rank EGC BLUE/ML FBs outperform the EGC MMSE/MOE FBs, due to the unbiased nature of the implicit BLUE channel estimators employed in the EGC BLUE/ML schemes.     

低密度奇偶校验码及其应用研究

阐述了低密度奇偶校验码的发展、定义、编译码方法。通过对LDPC码和Turbo码的比较和分析,得出LDPC码的整体性能要优于Turbo码。文中还讨论了LDPC码的应用,主要是在STC-OFDM系统中的应用。最后,对低密度奇偶校验码的未来的研究方向进行了展望。     

Compact Harmonic Filter Design and Fabrication Using IPD Technology

An integrated passive device (IPD) technology has been developed to meet the ever increasing needs of size and cost reduction in radio front-end transceiver module applications. Electromagnetic (EM) simulation was used extensively in the design of the process technology and the optimization of inductor and harmonic filter designs and layouts. Parameters such as inductor shape, inner diameter, metal thickness, metal width, and substrate thickness have been optimized to provide inductors with high quality factors. The technology includes 1) a thick plated gold metal process to reduce resistive loss; 2) MIM capacitors using PECVD SiN dielectric layer; 3) airbridges for inductor underpass and capacitor pick-up; and 4) a 10 mil finished GaAs substrate to improve inductor quality factor. Both lumped element circuit simulations and electromagnetic (EM) simulations have been used in the harmonic filter circuit designs for high accuracy and fast design cycle time. This paper will present the EM simulation calibration and demonstrate the importance of using EM simulation in the filter design in order to achieve first-time success in wafer fabrication. The fabricated IPD devices have insertion loss of 0.5 dB and harmonic rejections of 30dB with die size of 1.42 mm for high band (1710 MHz-1910 MHz) and 1.89 mm for low band (824-915 MHz) harmonic filters.