The use of transparent conducting indium-zinc oxide film as a current spreading layer for vertical-structured high-power GaN-based light-emitting diodes

In this study, the performance of vertical-structured high-power GaN-based light-emitting diodes (VM-LEDs) with a transparent and low-resistant indium-zinc oxide (IZO) film as a current spreading layer (CSL) was investigated. Nickel electroplating and patterned laser liftoff techniques were employed for the transfer of sapphire substrate to nickel substrate. The novel IZO CSL atop n-side-up VM-LEDs offering benefits of superior current spreading ability, larger extraction efficiency, and lower forward voltage drop was demonstrated. As compared to the regular LED without IZO CSL, the use of an IZO CSL with an optimum thickness of around 300 nm leads to an increase in light output power by 97.1 (67.8)% and a decrease in forward voltage drop by 4.9 (15.5)% under an injection current of 350 (800) mA.     

Bandwidth-expandable erbium-doped fiber amplets

A narrow-band optical amplifier (“amplet”) is proposed and demonstrated that can be constructed into an amplifier-based subsystem to perform nonlinear dispersion compensation and to flatten gain while the input level changes in a dense wavelength-division-multiplexed (DWDM) optical networking system. The amplet is designed to inherently provide two networking features: narrow-band accessibility and bandwidth scalability. For a 100-GHz-spaced DWDM application, each amplet can process four channels. The crosstalk between amplets is better than 58 dB. The capability to flatten gain and improve the transient response is experimentally demonstrated when an amplet array subsystem is formed     

Motion-based grouping of optical flow fields: the extrapolation andsubtraction technique

The goal of three-dimensional (3-D) motion segmentation is to identify the image areas projected by different moving objects in 3-D space. However, many prevailing methods merely detected the discontinuity of optical flow field and usually considered these boundaries as that produced by different 3-D motions. In fact, the flow discontinuity can be generated either by two different 3-D motions or by the structural discontinuity on the same moving object. The wrong identification causes several problems in 3-D motion estimation. A simple method called the extrapolation and subtraction (ES) technique is proposed to solve these problems. The input image flow field is first partitioned into several functionally analytic regions. Each analytic region is assumed to be projected by a roughly planar patch moving in 3-D space. Based on the parameterization of these analytic flow fields, the ES technique provides a very simple and fast method to test the 3-D motion compatibility between two interested analytic flow fields.     

An Unassisted, Low Trigger-, and High Holding-Voltage SCR (uSCR) for On-Chip ESD-Protection Applications

A new silicon-controlled rectifier (SCR) is proposed and realized in a 0.35-mum/3.3-V fully salicided BiCMOS process for electrostatic-discharge (ESD) applications. Without using an external trigger circuitry, the unassisted SCR has a trigger voltage as low as 7 V to effectively protect deep-submicrometer MOS circuits, a holding voltage higher than the supply voltage to minimize transient influence and avoid latch-up issue, and a second snapback current density exceeding 60 mA/mum to provide robust ESD-protection solutions.     

Characterization of Time Variation on 1.9 GHz Fixed Wireless Channels in Suburban Macrocell Environments

We observed temporal fading on 1.9 GHz fixed wireless channels during short-term measurements at 107 different locations in a suburban macrocell environment characterized by flat terrain and heavy foliage in order to determine how the rate of fading varies with average wind speed and distance. For each location, we estimated: (1) the Ricean K-factor using a momentbased estimator and (2) an equivalent Doppler frequency which is related to the maximum Doppler frequency by a factor that depends upon the shape of the Doppler spectrum. We did so by fitting the measured level crossing rate (LCR) and average fade duration (AFD) distributions to expressions normally justified for mobile wireless links using a method recently proposed by Feick, Valenzuela and Ahumada (2007). As has been observed at other sites, the Ricean K-factor decreased with both average wind speed and distance. However, we found that the equivalent Doppler frequency was effectively uncorrelated with wind speed and noticeably increased with distance. Similar measurements at other sites will be required to determine the extent to which these trends are affected by foliage density and tower height.     

An improved model for four-terminal junction field-effecttransistors

The junction field-effect transistor (JFET) has isolated top- and bottom-gate terminals and therefore is useful for signal mixing applications. Existing models for the four-terminal JFET often have the same form as the three-terminal JFET model, however, in which only a single pinch-off voltage is used to describe the current-voltage characteristics. In this paper, a more general four-terminal JFET model is developed. Two different pinch-off voltages are involved in the improved model to account more comprehensively for the effects of both depletion regions associated with the top- and bottom-gate junctions. Results simulated from a device simulator are also included in support of the model     

A method to extract mobility degradation and total seriesresistance of fully-depleted SOI MOSFETs

Free-carrier mobility degradation in the channel and drain/source series resistance are two important parameters limiting the performance of MOS devices. In this paper, we present a method to extract these parameters from the drain current versus gate voltage characteristics of fully-depleted (FD) SOI MOSFETs operating in the saturation region. This method is developed based on an integration function which reduces errors associated with the extraction procedure and on the DC characteristics of MOS devices having several different channel lengths. Simulation results and measured data of FD SOI MOSFETs are used to test and verify the method developed     

Optimization of on-chip ESD protection structures for minimal parasitic capacitance

Diodes are key components in on-chip electrostatic discharge (ESD) protection design. As the operating frequency of the microchip being protected against the ESD continues to increase, the parasitic capacitance associated with the diodes in the ESD structure starts to impose problems for RF operation. This paper presents a systematic approach to optimize the diode structure for minimal parasitic capacitance based on the requirements of breakdown voltage and heat dissipation. Device simulator Atlas with mix-mode simulation capability is calibrated against measurement data and used to carry out the optimization. An optimized diode structure with a parasitic capacitance of less than 30 fF at an operating frequency of 10 GHz and ESD charging voltage of 1 kV has been suggested. Furthermore, a case study to implement and optimize the ESD protection structure based on an existing 0.13-μm CMOS technology has been presented and verified.     

Semiconductor devices for RF applications: evolution and current status

This paper reviews the history, evolution, current status, and applications of semiconductor devices for radio frequency (RF) applications. The most important developments and major milestones leading to modern high-performance RF transistors are presented. Heterostructures, which are key elements for some advanced RF transistors, are described, and an overview of the different transistor types and their figures of merit is given. Applications of RF transistors in civil RF systems with special emphasis on wireless communication systems are addressed, and the issues of transistor reliability are also briefly discussed.     

Fabrication of Dicing-Free Vertical-Structured High-Power GaN-Based Light-Emitting Diodes With Selective Nickel Electroplating and Patterned Laser Liftoff Techniques

Through the use of selective nickel (Ni) electroplating, patterned laser liftoff technique, and surface roughing of the top n-GaN epilayer, a novel process for the fabrication of vertical-structured metal-substrate GaN-based light-emitting diodes (VM-LEDs) to avoid difficulties in Ni substrate dicing and improve device yield was proposed and demonstrated. In conjunction with a sidewall passivation with SiO₂ and keeping the size of epilayer smaller than that of Ni island, a considerable improvement in yield and device performance were shown. As compared to conventional lateral-structured GaN-based LEDs, VM-LEDs show an increase in light output power about 174% at 350 mA with a significant decrease in forward voltage from 3.5 to 3.17 V