A high efficiency transmitter and receiver for magnetic resonant wireless battery charging system in 0.35 μm BCD

This paper presents a transmitter and receiver for magnetic resonant wireless battery charging system. In the receiver, a wide-input range CMOS multi-mode active rectifier is proposed for a magnetic resonant wireless battery charging system. The configuration is automatically changed with respect to the magnitude of the input AC voltage. The output voltage of the multi-mode rectifier is sensed by a comparator. Furthermore, the configuration of the multi-mode rectifier is automatically selected by switches as original rectifier mode, 1-stage voltage multiplier or 2-stage voltage multiplier mode. As a result, a rectified DC voltage is output from 7.5 to 19 V for an input AC voltage of 5–20 V. In the transmitter, a class-E power amplifier (PA) with an automatic power control loop and load compensation circuit is proposed to improve the power efficiency. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This chip is implemented using 0.35 μm BCD technology with an active area of around 5,000 × 2,500 μm. When the magnitude of the input AC voltage is 10 V, the power conversion efficiency of the multi-mode active rectifier is about 94 %.The maximum power efficiency of the receiver is about 70 %. The transmitter provides an output power control range of 10–30.2 dBm. The maximum power efficiency of the PA is 71.5 %.     

Design and Analysis of an Interference Cancellation Algorithm for AF,DF and DMF Relay Protocol in Multiuser MIMO Scenario Based on the LTE-Advanced System

The analysis and design of relay protocols is a hot issue in 3GPP Long Term Evolution—Advanced. In this paper, we discuss interference cancellation in a multiuser MIMO environment using Amplify-and-Forward (AF), Decode-and-Forward (DF) and De-Modulate-and-Forward (DMF) as relay protocols, and using Thomilson Harashima Precoding and Dirty Paper Coding as precoding techniques, with Zero-Forcing, Minimum Mean Square Error, Successive Interference Cancellation and Ordered Successive Interference Cancellation detection techniques. By using a combination of classical precoding schemes and detection techniques with weighted matrix, we propose a new interference cancellation technique that is capable of cancelling interference. The interference cancellation is managed by AF, DF and DMF relay node protocols and the interference free codeword is transmitted to the selected User Equipment. The proposed algorithm when used with DMF protocol shows best performance, compared to the conventional system or the no-relay system case, it gives best performance. The observation results shows that DMF protocol gives the best results for BER and Throughput performance in a high interference environment.     

Discrete-time analysis of a CPCH access scheme in W-CDMA

Common packet channel (CPCH) access is an efficient approach to support packet data transmissions in a wideband code division multiple access (W-CDMA) system. Rather than using a continuous-time analysis approach, this paper presents a discrete-time analysis of the CPCH access scheme to fully characterize the complete CPCH operation process. Previous studies using the continuous-time analysis only models a portion of the CPCH process. We assume that a packet arrival process is Poisson distributed and the service time of each packet is geometrically distributed. The study focuses on examining the number of packet arrivals in each CPCH access slot. Performance is evaluated in terms of normalized throughput and it is observed that CPCH performs better when packet mean service time is larger. The performance results are also compared with previous studies using continuous-time analyses     

High Performance Three‐Dimensional Chemical Sensor Platform Using Reduced Graphene Oxide Formed on High Aspect‐Ratio Micro‐Pillars

The sensing performance of chemical sensors can be achieved not only by modification or hybridization of sensing materials but also through new design in device geometry. The performance of a chemical sensing device can be enhenced from a simple three‐dimensional (3D) chemiresistor‐based gas sensor platform with an increased surface area by forming networked, self‐assembled reduced graphene oxide (R‐GO) nanosheets on 3D SU8 micro‐pillar arrays. The 3D R‐GO sensor is highly responsive to low concentration of ammonia (NH₃) and nitrogen dioxide (NO₂) diluted in dry air at room temperature. Compared to the two‐dimensional planar R‐GO sensor structure, as the result of the increase in sensing area and interaction cross‐section of R‐GO on the same device area, the 3D R‐GO gas sensors show improved sensing performance with faster response (about 2%/s exposure), higher sensitivity, and even a possibly lower limit of detection towards NH₃ at room temperature.     

Direct Transfer Printing with Metal Oxide Layers for Fabricating Flexible Nanowire Devices

A direct printing method for fabricating devices by using metal oxide transfer layers instead of conventional transfer media such as polydimethylsiloxane is presented. Metal oxides are not damaged by organic solvents; therefore, electrodes with gaps less than 2 μm can be defined on a metal oxide transfer layer through photolithography. In order to determine a suitable metal oxide for use as transfer layer, the surface energies of various metal oxides are measured, and Au layers deposited on these oxides are transferred onto polyvinylphenol (PVP). To verify the feasibility of our approach, Au source–drain electrodes on transfer layers and Si nanowires (NWs) addressed by the dielectrophoretic (DEP) alignment process are transferred onto rigid and flexible PVP‐coated substrates. Based on transfer test and DEP process, Al₂O₃ is determined to be the best transfer layer. Finally, Si NWs field effect transistors (FETs) are fabricated on a rigid Si substrate and a flexible polyimide film. As the channel length decreases from 3.442 to 1.767 μm, the mobility of FET on the Si substrate increases from 127.61 ± 37.64 to 181.60 ± 23.73 cm² V^?1 s^?1. Furthermore, the flexible Si NWs FETs fabricated through this process show enhanced electrical properties with an increasing number of bending cycles.     

Condensation Induced Delamination of Nanoscale Hydrophobic Films

Vapor condensation is a crucial phenomenon governing the efficiency of many processes. In particular, dropwise condensation on hydrophobic thin films (≈100 nm‐thick) has the potential to achieve remarkable heat transfer. However, the lack of durability of these thin films has limited applications for a century. Although degradation due to steam condensation has been described as “blistering,” no satisfactory insight exists capable of elucidating the driving force for film delamination. Here, it is shown that nanoscale pinholes in hydrophobic films are the source of blister formation. By creating artificial pinholes via nanoindentation on thin (30 to 500 nm‐thick) fluorinated hydrophobic films, it is demostrated that water blisters can be initiated at the pinholes during condensation. It is experimentally demonstrated that vapor is transferred to the blister through the nanoscale pinhole, and the driving force for delamination is capillary pressure generated at the pinhole by the pinned liquid–vapor interface. The techniques and insights presented here will inform future work on polymeric thin film and enable their durable design for a variety of applications.     

Highly Power‐Efficient Rack‐Level DC Power Architecture Combined with Node‐Level DC UPS

This letter presents a highly efficient rack‐level DC power architecture combined with a node‐level DC uninterruptible power supply (UPS). The proposed system can provide almost the equivalent power efficiency of a high‐voltage DC data center without any change in the existing power infrastructure. The node‐level DC UPS combined with a power distribution board provides high power efficiency as well as lower UPS installation costs. Implemented on a rack, the entire power system can be monitored through a network.     

Sub‐Nanometer Level Size Tuning of a Monodisperse Nanoparticle Array Via Block Copolymer Lithography

The fabrication and catalytic application of a size‐tunable monodisperse nanoparticle array enabled by block copolymer lithography is demonstrated. Highly uniform vertical cylinder nanodomains are achieved in poly(styrene‐block‐4‐vinylpyridine) (PS‐b‐P4VP) diblock copolymer thin‐films by solvent annealing. The prominent diffusion of the anionic metal complexes into the protonated P4VP cylinder nanodomains occurs through specific electrostatic interactions in a weakly acidic aqueous solution. This well‐defined diffusion with nanoscale confinement enables preparation of the laterally ordered monodisperse nanoparticle array with sub‐nanometer level precise size tuning. The controlled growth of monodisperse nanoparticle arrays is proven by their catalytic use for vertical carbon nanotube (CNT) growth via plasma enhanced chemical vapor deposition (PECVD). Since the size of the catalyst particles is the decisive parameter for the diameters and wall‐numbers of CNTs, the highly selective growth of double‐walled or triple‐walled CNTs could be accomplished using monodisperse nanoparticle arrays.     

A Simple Space-Time-Frequency Block Code Scheme for Four Transmit Antennas

It is well known that the full rate and full diversity complex space-time block code (STBC) is not existed for four transmit antennas. In this letter, we propose a simple quasi-orthogonal space-time-frequency block code (QO-STFBC) scheme with four transmit antennas and n _R receive antennas, where every two transmit antennas constitute one group and each group transmits signals over different subcarriers. The receiver can separate the received signals from each group via odd/even index FFT operation. After recombining the separated received signals with received antennas, an equivalent half rate orthogonal STFBC (O-STFBC) can be used for decoding. Thus, the full rate and full diversity are achieved at the transmitter and receiver, respectively. Simulation result shows that the proposed QO-STFBC scheme has better performance than the other schemes, in rate 2 layered Alamouti scheme is about 4 dB, full rate QO-STBC scheme is about 5 dB and half rate O-STBC scheme is about 7 dB at 10^?3 BER for the transmission of 2 bits/s/Hz.     

Balanced RF Duplexer with Low Interference Using Hybrid BAW Resonators for LTE Application

A balanced RF duplexer with low interference in an extremely narrow bandgap is proposed. The Long‐Term Evolution band‐7 duplexer should be designed to prevent the co‐existence problem with the WiFi band, whose fractional bandgap corresponds to only 0.7%. By implementing a hybrid bulk acoustic wave (BAW) structure, the temperature coefficient of frequency (TCF) value of the duplexer is successfully reduced and the suppressed interference for the narrow bandgap is performed. To achieve an RF duplexer with balanced Rx output topology, we also propose a novel balanced BAW Rx topology and RF circuit block. The novel balanced Rx filter is designed with both lattice‐ and ladder‐type configurations to ensure excellent attenuation. The RF circuit block, which is located between the antenna and the Rx filter, is developed to simultaneously function as a balance‐to‐unbalance transformer and a phase shift network. The size of the fabricated duplexer is as small as 2.0 mm × 1.6 mm. The maximum insertion loss of the duplexer is as low as 2.4 dB in the Tx band, and the minimum attenuation in the WiFi band is as high as 36.8 dB. The TCF value is considerably lowered to ?16.9 ppm/°C.