Polarising fibre coupler with high extinction ratio

Fused polarising fibre couplers have been fabricated using single-polarisation single-mode fibres. When circularly polarised light is fed into the coupler, one of the two orthogonal polarisation modes suffers strong attenuation, and only one polarisation mode couples in the fused biconical taper region. The extinction ratio of the coupler is 41 dB at a wavelength ? = 1.3 ?m with a coupling ratio of 48:52.     

Mutual injection-locking properties of monolithically-integratedsurface-emitting multiple-quantum-well distributed feedback lasers

The mutual injection-locking properties of a coupled pair of multiple-quantum-well distributed-feedback lasers with grating output couplers were investigated experimentally and theoretically. When the mutual injection locking occurred, the output of one laser decreased while that of the other increased. The locking curve was asymmetric, and a stable and an unstable locking region existed. From the theoretical analysis, it was found that the phase delay with which the electric field emitted from each laser to the other laser significantly influences the locking characteristics. The increase and decrease of the locked output power are caused by the phase delay. It is also shown that the laser which receives the larger optical injection behaves like a slave laser and the laser which has less optical injection behaves like a master laser, and the shape of the locking curve is determined by the balance between the α parameter and the thermal resistance     

Experimental and numerical analysis of channel-length-dependent electrical properties in bottom-gate,bottom-contact organic thin-film transistors with Schottky contact

Channel length dependence of field-effect mobility and source/drain parasitic resistance in pentacene thin-film transistors with a bottom-gate, bottom-contact configuration was investigated. Schottky barrier effect such as nonlinear behaviors in transistor output characteristics appeared and became more prominent for shorter channel length less than 10 μm, raising some concerns for a simple utilization of conventional parameter extraction methods. Therefore the gate-voltage-dependent hole mobility and the source/drain parasitic resistance in the pentacene transistors were evaluated with the aid of device simulation accounting for Schottky contact with a thermionic field emission model. The hole mobility in the channel region shows smaller values with shorter channel length even after removing the influence of Schottky barrier, suggesting that some disordered semiconductor layers with low carrier mobility exist near the contact electrode. This experimental data analysis with the simulation enables us to discuss and understand in detail the operation mechanism of bottom-gate, bottom-contact transistors by considering properly each process of charge carrier injection, carrier flow near the contact region, and actual channel transport.     

Thermal stability of interfaces between metals and InP-based materials

The thermal stability of interfaces between metals (Ni, Pt, Ti, Mo) and III-V compound semiconductors has been investigated by the application of Rutherford backscattering spectrometry. Metal diffusion and interfacial lattice disorder of the semiconductors were analyzed for various metal/semiconductor samples annealed at temperatures up to 500°C. The interfaces of Ni/GaAs and Ti/GaAs were found to be more stable than those of Ni/In-based semiconductors and Ti/ In-based semiconductors, respectively. Faster diffusion of Pt atoms was ob-served in In-and As-containing materials than in P-containing materials. Mo/ semiconductor interfaces were the most stable.     

A 0.1-μm delta-doped MOSFET fabricated with post-low-energyimplanting selective epitaxy

A simple fabrication technology for delta-doped MOSFETs, named post-low-energy implanting selective epitaxy (PLISE) is presented. The PLISE technology needs no additional photo-lithography mask, deposition step or etching step even for CMOS devices. The only additional step is growing undoped epitaxial channel layers by UHV-CVD after the channel implantation. With this technology, delta-doped NMOSFETs with 0.1-μm gate length were successfully fabricated. By optimizing the epi-layer thickness and the channel doping level, short-channel effects are suppressed enough to achieve 0.1-μm gate length. Moreover, the junction capacitance at zero bias is reduced by 50%     

DX centers in AlxGa1-xAs bulk alloy,AlAs/GaAs ordered,and disordered superlattices

Properties of theDX centers in Al_0.5Ga_0.5As bulk alloy (b-AL), (AlAs)₂ (GaSa)₂ ordered superlattice (o-SL) and (AlAs) _m (GaAs) _n disordered superlattice (d-SL) (m = 1, 2, 3,n = 1, 2, 3) with the same macroscopic composition were measured and compared. By deconvolution of deep level transient spectroscopy (DLTS) spectrum due to theDX center, we have found a decrease in the number of separate peaks in DLTS spectrum in an intentionally atomic ordered arrangement. Visiting Scholar of the Japan Society for the Promotion of Science. On leave from Department of Electrical Engineering, San Jose State University, San Jose, California 95192-0084, USA.     

A GaAs MESFET with a partially depleted p layer for SRAMapplications

A GaAs MESFET with a partially depleted p layer that has a specific application to SRAMs has been developed. The short-channel effect is well suppressed for gate lengths down to 0.5 μm by a rather dense p layer buried under the channel. Its acceptor ion dose is as high as 2×10¹² cm^-2, which corresponds to a partially depleted condition. As for applications for SRAMs, it is possible to attain fully functional 7-ns 4-kb SRAMs that are operative at 75°C by using the FET with a 1-μm gate. A chip yield of 22% has been achieved in a 3-in wafer     

Outstanding Low-Temperature Performance of Structure-Controlled Graphene Anode Based on Surface-Controlled Charge Storage Mechanism

The energy and power performance of lithium (Li)-ion batteries is significantly reduced at low-temperature conditions, which is mainly due to the slow diffusion of Li-ions in graphite anode. Here, it is demonstrated that the effective utilization of the surface-controlled charge storage mechanism through the transition from layered graphite to 3D crumpled graphene (CG) dramatically improves the Li-ion charge storage kinetics and structural stability at low-temperature conditions. The structure-controlled CG anode prepared via a one-step aerosol drying process shows a remarkable rate-capability by delivering ≈206 mAh g^–1 at a high current density of 10 A g^–1 at room temperature. At an extremely low temperature of −40 °C, CG anode still exhibits a high capacity of ≈154 mAh g^–1 at 0.01 A g^–1 with excellent rate-capability and cycling stability. A combination of electrochemical studies and density functional theory (DFT) reveals that the superior performance of CG anode stems from the dominant surface-controlled charge storage mechanism at various defect sites. This study establishes the effective utilization of the surface-controlled charge storage mechanism through structure-controlled graphene as a promising strategy to improve the charge storage kinetics and stability under low-temperature conditions.     

A 500-MHz 4-Mb CMOS pipeline-burst cache SRAM with point-to-pointnoise reduction coding I/O

A 32-b 500-MHz 4-1-1-1 operation 4-Mb pipeline burst cache SRAM has been developed. In order to achieve both high bandwidth operation and short latency operation, we developed the following technologies: 1) a prefetched pipeline-burst scheme with double late-write buffers, 2) gate size reduction and a bit-line equalization by source resetting, 3) point-to-point bidirectional coding I/O's to reduce bus noise and power consumption, and 4) a three-level metal 0.25-μm CMOS process technology with six transistor memory cells     

Extremely low noise InGaAs/InAlAs HEMT grown by MOCVD

MOCVD-grown InGaAs/InAlAs HEMTs with excellent noise performance comparable to that of MBE-grown devices have been successfully fabricated. A minimum noise figure lower than 0.30 dB has been obtained with an associated gain of approximately 15 dB at 12 GHz. Furthermore, devices in ceramic packages have exhibited a minimum noise figure of 0.42 dB.<>