Modeling of the zero-bias resistance-area product of long wavelength infrared HgCdTe-on-Si diodes fabricated from molecular beam epitaxy-grown epitaxial layers

The electrical effects of dislocations has been studied by modeling zero-bias resistance-area product (R₀A) of long wavelength infrared diodes fabricated in molecular beam epitaxy (MBE)-grown HgCdTe-Si epitaxial films. Results show that dislocations influence both 40 K and 78 K R₀A products in high dislocation density (HgCdTe/Si) material. In low dislocation density samples (HgCdTe/CdZnTe), the variations in 78 K R₀A are limited by the composition (x) variations in Hg_1-xCd_xTe material, whereas dislocation contribution dominates the variations at 40 K. The origin of relatively large spread in 40 K R₀A in both types of samples is traced to the statistical variations in the core charges of dislocations. It is concluded that additional alternatives besides the reduction of dislocation density (such as control of core charges), may also need attention in order to make Si a viable substrate material for the growth of HgCdTe epitaxial layers suitable for devices operating at 40 K.     

Development of nano-composite lead-free electronic solders

Inert, hybrid inorganic/organic, nano-structured chemicals can be incorporated into low melting metallic materials, such as lead-free electronic solders, to achieve desired levels of service performance. The nano-structured materials technology of polyhedral oligomeric silsesquioxanes (POSS), with appropriate organic groups, can produce suitable means to promote bonding between nano-reinforcements and the metallic matrix. The microstructures of lead-free solder reinforced with surface-active POSS tri-silanols were evaluated using scanning electron microscopy (SEM). Wettability of POSS-containing lead-free solders to copper substrate was also examined. Steady-state deformation of solder joints made of eutectic Sn-Ag solder containing varying weight fractions of POSS of different chemical moieties were evaluated at different temperatures (25°C, 100°C, and 150°C) using a rheometric solids analyzer (RSA-III). Mechanical properties such as shear stress versus simple shear-strain relationships, peak shear stress as a function of rate of simple shear strain, and testing temperature for such nano-composite solders are reported. The service reliability of joints made with these newly formulated nano-composite solders was evaluated using a realistic thermomechanical fatigue (TMF) test profile. Evolution of microstructures and residual mechanical property after different extents of TMF cycles were evaluated and compared with joints made of standard, unreinforced eutectic Sn-Ag solder.     

Reprocessing of thermally oxidized aluminum arsenide (AlAs) in epitaxial multilayers without delamination

Annealing or processing of AlAs that has been subjected to a wet thermal oxidation process can result in severe delamination of material at the oxidation front. This paper reports a procedure for preventing this delamination and presents a possible cause for the delamination.     

End-to-End Rate Adaptation to Support Heterogeneous Services for Infrastructure-Based Vehicular Networks

Vehicle to Infrastructure(V2I) communications aim to provide mobile users on the road low-cost Internet and driver safety services.However, to meet Quality of Service(QoS) requirements of various applications and efficiently utilize limited wireless channel resourc-es, the transport layer protocol has to perform effective rate control in low channel quality and frequent changing topology communica-tion environment. In this paper, we propose a novel rate-control scheme in infrastructure based vehicular networks that avoids conges-tion and starvation and promotes fairness in end-to-end V2I communications. In vehicular networks, a bottleneck roadside unit(RSU)keeps track of its buffer size, aggregate incoming rate, and link throughput, and appropriately allocates bandwidth to traversing flows.With feedback information from the RSU, source nodes dynamically adjust their sending rates to avoid buffer overflow or starvation atthe bottleneck RSU. Simulation results show that the proposed scheme can reduce not only packet losses owing to buffer overflow butalso buffer starvation time, which improves the utilization efficiency of wireless channel resource.     

Low Complexity Time Domain Interleaved Partitioning Partial Transmit Sequence Scheme for Peak-to-Average Power Ratio Reduction of Orthogonal Frequency Division Multiplexing Systems

As an attractive technique for peak-to-average power ratio (PAPR) reduction in orthogonal frequency division multiplexing (OFDM) systems, time domain interleaved partitioning partial transmit sequence (TD-IP-PTS) scheme uses circular convolution property of discrete Fourier transforms (DFT) so as to need only one inverse fast Fourier transform (IFFT) operation. However, the search and combination of phase factors still need higher computational complexity. In order to improve the problem, this paper detailedly analyzes the independence of phase factor vectors and optimizes the phase factor vectors in TD-IP-PTS. Furthermore, we find the characteristic of combination of phase factors and propose three methods respectively based on storage-unit, pipeline and select-path to implement the combination of phase factors in TD-IP-PTS. The simulation results show that TD-IP-PTS using independent and effective phase factor vectors has better PAPR performance and lower complexity than traditional IP-PTS. Moreover, among three proposed methods for combination of phase factors, the method based on select-path requires the least registers and delay time. This method is the most promising in practical applications.     

FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data

Applications based on Discrete Fourier Transforms (DFT) are extensively used in several areas of signal and digital image processing. Of particular interest is the two-dimensional (2D) DFT which is more computation- and bandwidth-intensive than the one-dimensional (1D) DFT. Traditionally, a 2D DFT is computed using Row-Column (RC) decomposition, where 1D DFTs are computed along the rows followed by 1D DFTs along the columns. Both application specific and reconfigurable hardware have utilized this scheme for high-performance implementations of 2D DFT. However, architectures based on RC decomposition are not efficient for large input size data due to memory bandwidth constraints. In this paper, we propose an efficient architecture to implement 2D DFT for large-sized input data based on a novel 2D decomposition algorithm. This architecture achieves very high throughput by exploiting the inherent parallelism due to the algorithm decomposition and by utilizing the row-wise burst access pattern of the external memory. A high throughput memory interface has been designed to enable maximum utilization of the memory bandwidth. In addition, an automatic system generator is provided for mapping this architecture onto a reconfigurable platform of Xilinx Virtex-5 devices. For a 2K ×2K input size, the proposed architecture is 1.96 times faster than RC decomposition based implementation under the same memory constraints, and also outperforms other existing implementations.     

Integrated Dual-Display-Based 3G Mobile Phone / Wireless Terminal

In this paper, we describe HW and SW features of the developed prototype of a hybrid 3G mobile phone and wireless terminal, which provides integral video projection onto two VGA/2 displays that, when put side-by-side, form the integrated display with the ratio of the overall width to its overall height, equal to 4:3, so providing the integral video VGA format and enabling visual presentation of standard full-size web pages, PC mainstream SW screens (such as e.g. the ones of e-mail clients), multi-media content etc. When not in use, the displays can be fold back one onto each other, so preserving the industry-standard dimensions of the device. The two displays that share the image provide it with overall resolution of 640 x 480 pixels per inch. The device is driven by Texas Instruments OMAP 2420 multimedia processor with ARM1136 core and Linux operating system. In addition, the device is equipped with specially developped prototypes of unique spring/microgenerator-based battery charger as well as with ultra-thin mountable foil-based QWERTY keyboard.     

Performance of Efficient Signal Detection for LED-ID Systems

In this paper, effects of reader-to-reader interference are investigated for LED identification (LED-ID) system in a multi-reader environment. The LED-ID readers typically use different channels to avoid collision between readers. However, in-channel collision usually happens in terms of interrogation range. A reader-to-reader interference scenario is proposed, and nominal interrogation range of a desired reader is derived from this model. In order to evaluate the LED-ID reader-to-reader interference quantitatively, an efficient detection scheme is proposed and simulated by employing spreading sequence. The spreading sequence is inserted between each user’s frame formats. In the receiver, the desired signal is detected by using correlation among inserted spreading sequences. From simulation results, it is confirmed that the proposed scheme is very effective to enhance reliability of LED-ID communication systems.     

A blind audio steganalysis based on feature fusion

In this paper, we present a blind steganalysis based on feature fusion. Features based on Short Time Fourier Transform (STFT), which consists of second-order derivative spectrum features of audio and Mel-frequency cepstrum coefficients, audio quality metrics and features on linear prediction residue are extracted separately. Then feature fusion is conducted. The performance of the proposed steganalysis is evaluated against 4 steganographic schemes: Direct Sequence Spread Spectrum (DSSS), Quantization Index Modulation (QIM), ECHO embedding (ECHO), and Least Significant Bit embedding (LSB). Experiment results show that the classifying performance of the proposed detector is much superior to the previous work. Even more exciting is that the proposed methodology could detect the four steganography, with 85%+ classification accuracy achieved in all the detections, which makes the proposed steganalysis methodology capable of being regarded as a blind steganalysis, and especially useful when the steganalyzer are without the knowledge of the steganographic scheme employed in data embedding.