Trap and 1/f-noise effects at the surface and core of GaN nanowire gate-all-around FET structure

Nano Research - Using capacitance, conductance and noise measurements, we investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1D) array of GaN...     

Parallel Memory Architecture for Elliptic Curve Cryptography over $$ \mathbb{G}\mathbb{F}{\left( p \right)} $$ Aimed at Efficient FPGA Implementation

Parallelization of operations is of utmost importance for efficient implementation of Public Key Cryptography algorithms. Starting with a classification of parallelization methods at different abstraction levels of public key algorithms, we propose a novel memory architecture for elliptic curve implementations with multiple modular multiplier units. This architecture is well-suited for different point addition and doubling algorithms over to be implemented on FPGAs. It allows the execution time to scale with the number of modular multipliers and exhibits nearly no overhead compared to the mere runtime of the multipliers. The advantages of this distributed memory architecture are demonstrated by means of two different point addition and doubling algorithms.

Autonomic microprocessor execution via self-repairing arrays

To achieve high reliability despite hard faults that occur during operation and to achieve high yield despite defects introduced at fabrication, a microprocessor must be able to tolerate hard faults. In this paper, we present a framework for autonomic self-repair of the array structures in microprocessors (e.g., reorder buffer, instruction window, etc.). The framework consists of three aspects: 1) detecting/diagnosing the fault, 2) recovering from the resultant error, and 3) mapping out the faulty portion of the array. For each aspect, we present design options. Based on this framework, we develop two particular schemes for self-repairing array structures (SRAS). Simulation results show that one of our SRAS schemes adds some performance overhead in the fault-free case, but that both of them mask hard faults 1) with less hardware overhead cost than higher-level redundancy (e.g., IBM mainframes) and 2) without the per-error performance penalty of existing low-cost techniques that combine error detection with pipeline flushes for backward error recovery (BER). When hard faults are present in arrays, due to operational faults or fabrication defects, SRAS schemes outperform BER due to not having to frequently flush the pipeline.     

Cultural Cognitive Style and Web Design: Beyond a Behavioral Inquiry into Computer-Mediated Communication

Numerous studies have identified links among culture, user preferences, and Web site usability. Most of these studies were reports of findings from a behavioral perspective in explaining how cultural factors affect processes of Web-related content design and use. Based on the research of Vygotsky and Nisbett, the authors propose a broader model, referred to as "cultural cognition theory," by which Web design, like other types of information production, is seen as being shaped by cultural cognitive processes that impact the designers' cognitive style. This study explores issues related to Web designers' cultural cognitive styles and their impact on user responses. The results of an online experiment that exposed American ¹ and Chinese users to sites created by both Chinese and American designers indicate that users perform information-seeking tasks faster when using Web content created by designers from their own cultures.     

Thermal noise and radiation pressure in MEMS Fabry-Perot tunablefilters and lasers

In this paper, we examine thermal noise and radiation-pressure effects in MEMS tunable Fabry-Perot etalons. We show that thermal noise causes a jitter in the center wavelength in very high finesse etalons. In turn, the jitter causes an effective increase in the time-averaged filter bandwidth. Radiation pressure is of little consequence in conventional Fabry-Perot etalons, but it can give rise to nonlinearities and hysteresis in the tuning response of high-finesse MEMS filters. We develop models of noise and optical nonlinearities and compare the models with a series of measurements on commercial tunable high-finesse MEMS Fabry-Perot etalons     

Specifying and verifying a broadcast and a multicast snooping cachecoherence protocol

We develop a specification methodology that documents and specifies a cache coherence protocol in eight tables: the states, events, actions, and transitions of the cache and memory controllers. We then use this methodology to specify a detailed, modern three-state broadcast snooping protocol with an unordered data network and an ordered address network that allows arbitrary skew. We also present a detailed specification of a new protocol called multicast snooping (Bilir et al., 1999) and, in doing so, we better illustrate the utility of the table-based specification methodology. Finally, we demonstrate a technique for verification of the multicast snooping protocol, through the sketch of a manual proof that the specification satisfies a sequentially consistent memory model     

Filter response of single-mode fibre recirculating delay lines

Single-mode fibre recirculating delay lines have been made on a single continuous loop of fibre with the use of fibre directional couplers. These devices have been demonstrated as bandpass filters and as notch filters at centre frequencies from 0.5 MHz to 1.3 GHz with a notch depth of over 45 dB.     

High-resolution solid-state NMR applied to polypeptides and membrane proteins

Solid-state NMR provides unique possibilities to study insoluble or noncrystalline molecules at the atomic level. High-resolution conditions can be established by employing magic-angle spinning at ultrahigh magnetic fields. We discuss NMR methods that make use of these experimental improvements and allow for the study of multiply or uniformly [(13)C,(15)N]-labeled polypeptides and proteins. Recent biophysical applications are reviewed.