用复合烷基锂引发丁二烯聚合

对以环己烷为溶剂、四氢呋喃为微观结构调节剂、复合烷基锂为引发剂的丁二烯聚合反应过程进行了研究，考察了不同引发温度、不同配比的复合烷基锂对聚合反应的影响，并与以正丁基锂为引发剂的丁二烯聚合反应过程进行了比较。     

复合棒弯曲振动的矩阵解法

按组成材料和横截面大小的不同，把复合棒分成若干单元，每单元两端的位移，截面转角，弯矩以及剪力间的关系用矩阵表示，各单元矩阵相乘即复到复合棒总的矩阵，最后由此求解复合棒的共振条件，以及两端振速比，还给出了应用例。     

镀铜／镍聚丙烯腈纤维填充复合材料电磁波屏蔽性能的研究

研究了镀铜／镍的聚丙烯腈纤维填充ＡＢＳ树脂制得的复合材料的导电性及电磁波屏蔽性能，复合材料的导电性主要与导电纤维的填加量有关，导电纤维与基体树脂间的相容状况、复合加工时某些工艺条件等对复合材料的导电性也有较大的影响，电磁波屏蔽性能随导电纤维填加量的增加而提高，加入适当的偶联剂有助于改善和复合材料的电磁波屏蔽性能。     

Evaporated Thin Films of CdS and CdTe: Optimization for Photovoltaic Applications

Thin films of cadmium sulphide and cadmium telluride have been prepared by thermal evaporation under various conditions of deposition. These films have been characterized optically. electrically and for structure determination. The results of these characterizations along with the initial results of all thin film CdS/CdTe solar cells are presented in this paper     

Behaviour of Hydrogen in Nano-transition Metals

Nanocrystalline transition metals were prepared with Ar+H2 arc plasma method. The hydrogenmust be used during preparation to get a special nanrvparticles. The hydrogen plays an importantrole in the structure and state of nanocrystalline transition metals. The state of hydrogen andthe change of the nanocrystalline metal structure caused by hydrogen are called the behaviour ofhydrogen in nano-transition metals which includes the ability and function of storing hydrogenin the metals.     

Characterization of Failure Mechanisms of Duplex and Graded Thermal Barrier Coatings Exposed to Thermal Shock Test

The beginning of failure of a (ZrO2-7%Y2O3)/(Ni-22%Co-17%Cr-12.5%Al-0.6%Y) duplex andgraded coating systems on lnconel 617 and IN738LC in burner rig tests has been characterized.The test conditions are 40 s heating up to 75O℃ substrate temperature followed by 80 s aircooling. Failure is considered at the appearance of the first bright spot during heating period.Stresses due to thermal expansion mismatch strains on cooling are the probable cause of life-limiting in this conditions of testing.     

Microstructure of Pd_(77.5)Au_6Si_(16.5) Alloy Droplet Solidified in a Drop Tube Process

The microstructure development of Pd77.5Au6Si16.5 alloy droplet solidified in a drop tube process was studied. It was found that two distinct microstructures, i.e. (Pd,Au)3Si primary phase and Pd+(Pd,Au)3Si eutectic can be obtained when the droplet diameter is within the range between 2.3~0.4 mm. The morpologies of the (Pd,Au)3Si developed from dendrite trunk-like with single branching only into dendrite cluster-like with ternary branching with the decrease of the droplet diameter. When the droplet diameter is about 0.25 mm, the primary phase (Pd,Au)3Si almost disappears and the microstructure mainly shows Pd+(Pd,Au)3Si eutectic. The morphology of the eutectic transforms from fiber-like to plate-like with the decrease of the droplet diameter in the range between 2.3-0.25 mm. When the droplet diameter is about 0.19 mm, the microstructure is only the single phase of Pd solid solution     

GaN的MOVPE生长和m－i－n型蓝光LED的试制

利用自行研制的常压ＭＯＶＰＥ设备和全部国产ＭＯ源，采用低温生长缓冲层技术，在蓝宝石（α－Ａｌ２Ｏ３）衬底上获得了高质量的ＧａＮ外延层。未掺杂的ＧａＮ外延层的室温电子迁移率已达１１４ｃｍ２／Ｖ．ｓ，载流于浓度为２×１０１８。７７Ｋ光致发光谱近带边发射峰波长为３６５ｎｍ，其线宽为４ＤｍｅＶ。Ｘ射线双晶衍射回摆曲线的线宽为３６０ａｒｃｓｅｃ。用Ｚｎ掺杂生长了绝缘的ｉ－ＧａＮ层。在此基础上研制了ｍ－ｉ－ｎ型ＧａＮ的ＬＥＤ，并在室温正向偏压下发出波长为４５５ｎｍ的蓝光。     

Circuit sensitivity to interconnect variation

Deep submicron technology makes interconnect one of the main factors determining the circuit performance. Previous work shows that interconnect parameters exhibit a significant amount of spatial variation. In this work, we develop approaches to study the influence of the interconnect variation on circuit performance and to evaluate the circuit sensitivity to interconnect parameters. First, an accurate interconnect modeling technique is presented, and an interconnect model library is developed. Then, we explore an approach using parameterized interconnect models to study circuit sensitivity via a ring oscillator circuit. Finally, we present an alternative approach using statistical experimental design techniques to study the sensitivity of a large and complicated circuit to interconnect variations     

Multimedia Signal Processors: An Architectural Platform with Algorithmic Compilation

Novel algorithmic features of multimedia applications and advances in VLSI technologies are driving forces behind the new multimedia signal processors. We propose an architecture platform which could provide high performance and flexibility, and would require less external I/O and memory access. It is comprised of array processors to be used as the hardware accelerator and RISC cores to be used as the basis of the programmable processor. It is a hierarchical and scalable architecture style which facilitates the hardware-software codesign of multimedia signal processing circuits and systems. While some control-intensive functions can be implemented using programmable CPUs, other computation-intensive functions can rely on hardware accelerators.To compile multimedia algorithms, we also present an operation placement and scheduling scheme suitable for the proposed architectural platform. Our scheme addresses data reusability and exploits local communication in order to avoid the memory/communication bandwidth bottleneck, which leads to faster program execution. Our method shows a promising performance: a linear speed-up of 16 times can be achieved for the block-matching motion estimation algorithm and the true motion tracking algorithm, which have formed many multimedia applications (e.g., MPEG-2 and MPEG-4).