Modeling of spiking analog neural circuits using organic semiconductor thin film transistors with silicon oxide nitride semiconductor gates

This paper uses the results of the characterization of amorphous semiconductor thin film transistors (TFTs) with the quasi-permanent memory structure referred to as silicon oxide nitride semiconductor (SONOS) gates, to model spiking neural circuits. SONOS gates were fabricated and characterized. In addition, MOSFETs using organic copper phthalocyanine (CuPc) were fabricated with these SONOS gates to demonstrate proof of concept performance. Analog spiking circuits were then modeled using these low performance TFTs to demonstrate the general suitability of organic TFTs in neural circuits. The basic circuit utilizes a standard comparator with charge and discharge circuits. A simple Hebbian learning circuit was added to charge and discharge the SONOS device. The use of these elements allows for the design and fabrication of high-density 3-dimensional circuits that can achieve the interconnect density of biological neural systems.     

Effects of PAI on interface properties between HfSiO gate dielectric and silicon substrate

The effects of preamorphization implantation (PAI) on the interface properties between hafnium-silicate (HfSiO) gate dielectrics and silicon substrates were examined. In the case of an NH/sub 3/ nitrided interface, it was found that the PAI can improve the interface trap density (D/sub IT/) compared with the no PAI case. However, for the PAI samples, it was also found that samples with sacrificial screening oxide (Sac Ox) had worse interface properties compared with the samples without Sac Ox. It is attributed to the recoiled oxygen from Sac Ox during PAI.     

Survey on blockchain-based non-fungible tokens: History,technologies, standards,and open challenges

This paper presents a survey of non-fungible tokens (NFTs), including its history, technologies, standards, and challenges in their development. An NFT is a unique digital entity that is created and maintained using blockchain technology. Each NFT is identified using a unique smart contract and a token ID, so the whole history of the NFT can be globally identified by its address and token ID. The blockchain information indelibly identifies the current owner of any asset, previous owners, and original creator. NFTs are used to manage ownership of digital and physical assets and cryptocurrencies. The prices of popular NFTs have become very high, and the market for them has overheated in recent years. NFT technology and its ecosystem have evolved since Quantum, the first NFT, was stored in the Namecoin blockchain. Ethereum has become the main platform for NFT projects because it provides support for smart contracts. Currently, almost all NFT projects are launched on the Ethereum blockchain. NFT has two major standards called ERC-721 and ERC-1155, which have had important functions in the development of NFT. Starting with these two standards, other standards for NFT continue to emerge; they expand the functionality of NFT such as by adding utility. However, NFT is a very early technology, and it has not been long after the NFT concept was created and used. So there are several challenges for further improving NFT technology, in terms of usability, interoperability, and evolution. This paper presents a survey of NFT, including its history, technologies, standards, and challenges of NFT.     

Computer-aided diagnosis of solid breast nodules: use of an artificial neural network based on multiple sonographic features

A computer-aided diagnosis (CAD) algorithm identifying breast nodule malignancy using multiple ultrasonography (US) features and artificial neural network (ANN) classifier was developed from a database of 584 histologically confirmed cases containing 300 benign and 284 malignant breast nodules. The features determining whether a breast nodule is benign or malignant were extracted from US images through digital image processing with a relatively simple segmentation algorithm applied to the manually preselected region of interest. An ANN then distinguished malignant nodules in US images based on five morphological features representing the shape, edge characteristics, and darkness of a nodule. The structure of ANN was selected using k-fold cross-validation method with k = 10. The ANN trained with randomly selected half of breast nodule images showed the normalized area under the receiver operating characteristic curve of 0.95. With the trained ANN, 53.3% of biopsies on benign nodules can be avoided with 99.3% sensitivity. Performance of the developed classifier was reexamined with new US mass images in the generalized patient population of total 266 (167 benign and 99 malignant) cases. The developed CAD algorithm has the potential to increase the specificity of US for characterization of breast lesions.     

Monolithic SiGe HBT Feedforward Variable Gain Amplifiers for 5 GHz Applications

Monolithic SiGe heterojunction bipolar transistor (HBT) variable gain amplifiers (VGAs) with a feedforward configuration have been newly developed for 5 GHz applications. Two types of the feedforward VGAs have been made: one using a coupled‐emitter resistor and the other using an HBT‐based current source. At 5.2 GHz, both of the VGAs achieve a dynamic gain‐control range of 23 dB with a control‐voltage range from 0.4 to 2.6 V. The gain‐tuning sensitivity is 90 mV/dB. At V_CTRL= 2.4 V, the 1 dB compression output power, P_1‐dB, and dc bias current are 0 dBm and 59 mA in a VGA with an emitter resistor and ‐1.8 dBm and 71mA in a VGA with a constant current source, respectively.     

Architectural Design Issues in a Clockless 32‐Bit Processor Using an Asynchronous HDL

As technology evolves into the deep submicron level, synchronous circuit designs based on a single global clock have incurred problems in such areas as timing closure and power consumption. An asynchronous circuit design methodology is one of the strong candidates to solve such problems. To verify the feasibility and efficiency of a large‐scale asynchronous circuit, we design a fully clockless 32‐bit processor. We model the processor using an asynchronous HDL and synthesize it using a tool specialized for asynchronous circuits with a top‐down design approach. In this paper, two microarchitectures, basic and enhanced, are explored. The results from a pre‐layout simulation utilizing 0.13‐μm CMOS technology show that the performance and power consumption of the enhanced microarchitecture are respectively improved by 109% and 30% with respect to the basic architecture. Furthermore, the measured power efficiency is about 238 μW/MHz and is comparable to that of a synchronous counterpart.     

Analysis of Failure in Miniature X‐ray Tubes with Gated Carbon Nanotube Field Emitters

We correlate the failure in miniature X‐ray tubes with the field emission gate leakage current of gated carbon nanotube emitters. The miniature X‐ray tube, even with a small gate leakage current, exhibits an induced voltage on the gate electrode by the anode bias voltage, resulting in a very unstable operation and finally a failure. The induced gate voltage is apparently caused by charging at the insulating spacer of the miniature X‐ray tube through the gate leakage current of the field emission. The gate leakage current could be a criterion for the successful fabrication of miniature X‐ray tubes.     

A Novel Complex Orthogonal Design for Space–Time Coding in Sensor Networks

In this paper, we propose a complex orthogonal design based on the theory of Finite projective plane. As most of the orthogonal designs incur low ratio of time diversity, the proposed complex orthogonal design has a relatively high ratio of time diversity. In addition, the proposed scheme has the following characteristics: (1) full spatial diversity (2) low rate (3) linear processing. We compare the proposed scheme with another complex design to show the tradeoffs. The proposed scheme can be of use for certain applications such as sensor networks and deep space exploration where there might be an imposed limit on the peak transmit power.     

Double S-Shaped Polarization – Voltage Curve and Negative Capacitance from Al2O3-Hf0.5Zr0.5O2-Al2O3 Triple-Layer Structure

The negative capacitance (NC) effect, recently discovered in a fluorite-based ferroelectric thin film, has attracted great attention as a rescue to overcome the scaling limitations of the conventional memory and logic devices of highly integrated circuits. The NC effect manifesting an S-shaped polarization–voltage (P–V) curve is initially interpreted by a 1-dimensional Landau Ginzburg Devonshire (LGD) model. However, a series of recent studies have found that this effect can also be explained by the inhomogeneous stray field energy (ISE) model. In this study, by extending the ISE model in the ferroelectric (FE)-dielectric (DE) layered structure, an analytical model that considers the influence of the interfacial screening charge distribution is presented. This model showed that the NC effect in the FE-DE heterostructure can be manifested in various forms other than a single S-shaped P–V curve. In particular, a double S-shaped P–V curve is expected from the fully compensated anti-parallel domain structure, confirmed experimentally in the actual Al₂O₃/(Hf_0.5Zr_0.5)O₂/Al₂O₃ triple-layer structure. Furthermore, to reveal the origin of the double S-shaped P–V curve, a multidomain LGD model is presented. It is confirmed that this phenomenon is attributed to the evolution of inhomogeneous stray field energy.