Air bearing design, optimization, stability analysis andverification for sub-25 nm flying

Three sub-25 nm fly height sliders are presented for near contact recording. The designs are geared towards the goal of achieving 10 Gb/in ² areal density. The optimization procedure presented shows promise for facilitating achievement of this goal. The dynamic simulations show the stability of these designs when disturbed from their steady state conditions     

Measurement and modeling of the sidewall threshold voltage ofmesa-isolated SOI MOSFETs

Five-terminal silicon-on-insulator (SOI) MOSFETs have been characterized to determine the threshold voltage at the front, back, and sidewall as a function of the body bias. The threshold voltage shift with the body bias at the front and back interfaces can be explained by the standard bulk body effect equation. However, the threshold voltage shift at the sidewall is smaller than predicted by this equation and saturates at large body biases. This anomalous behavior is explained by two-dimensional charge sharing between the sidewall and the front and back interfaces. An analytical model that accounts for this charge sharing by a simple trapezoidal approximation of the depletion regions and correctly predicts the sidewall threshold voltage shift and its saturation is discussed. The model makes it possible to measure the sidewall threshold even when it is larger than the front threshold voltage     

情浸丹青写名园——小谈郝永明的古建园林绘画艺术

郝永明古建园林绘画作品另辟蹊径，难能可贵。郝永明的画，不仅给我国美术宝库增加了一份积累，也给古建园林艺术增添了珍贵的资料。     

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor

A 4-MB L2 data cache was implemented for a 64-bit 1.6-GHz SPARC(r) RISC microprocessor. Static sense amplifiers were used in the SRAM arrays and for global data repeaters, resulting in robust and flexible timing operation. Elimination of the global clock grid over the SRAM array saves power, enabled by combining the clock information with array select signals. Redundancy was implemented flexibly, with shift circuits outside the main data array for area efficiency. The chip integrates 315 million transistors and uses an 8-metal-layer 90-nm CMOS process.     

60m高度处单片露天超高混凝土悬臂墙的设计与施工

通过采用竖向预应力技术 ,解决了 60m高度处单片 8m高悬臂钢筋混凝土墙根部裂缝宽度超过规范限值的问题 ;采用将预应力钢绞线顶端锚固于墙高中段等结构和施工措施 ,控制墙体长细比不超过 3 0 ,减少了由于长细比过大对墙体承载力的不利影响     

新浦江城规划设计优劣分析

文章通过对上海“新浦江城”首期项目的介绍，分析了意大利设计在该项目应用中的独特之处，同时指出了存在的一些问题。指出国外设计应结合中国国情，符合社会发展的需要。     

花艺教室：荆丛亦风流

运动的环热烈的爱//圆点示爱//纯洁爱情//心心相印//透过玻璃的美     

Modeling Power Supply Noise in Delay Testing

Excessive power supply noise during test can cause overkill. This article discusses two models for supply noise in delay testing and their application to test compaction. The proposed noise models avoid complicated power network analysis, making them much faster than existing power noise analysis tools. can cause performance degradation and     

高压乙烯压缩机出入口管线振动分析及改造

为减轻高压乙烯压缩机出入口管线的振动,采用有限元建模方法,对管线结构固有频率及各阶振型进行分析计算,详细讨论了在管线同一位置加不同约束和在不同位置加同一约束的情况对管线振动的影响.最后,结合测试数据和现场实际情况提出了改造方案.实际使用结果证明改造措施有效,达到了预期的防振效果.     

Quantifying Organization by Means of Entropy

With the aim to reduce disorder and improve efficiency, nodes in an ad hoc network run a self-organization scheme to cooperatively organize the network. Although metrics such as complexity or self-stability are commonly used for evaluation, to the best of our knowledge, none of them quantifies the efficiency to build and maintain an organization (order). We henceforth apply the notion of entropy to ad hoc type wireless networks facilitating a quantification of the internal organizational state generated by different self-organization schemes. Invoking node and link failure probabilities, we expose the dependency of the organizational state on the self-organization protocol of choice.