Design and analysis of low-power cache using two-level filter scheme

Power consumption is an increasingly pressing problem in modern processor design. Since the on-chip caches usually consume a significant amount of power, it is one of the most attractive targets for power reduction. This paper presents a two-level filter scheme, which consists of the L1 and L2 filters, to reduce the power consumption of the on-chip cache. The main idea of the proposed scheme is motivated by the substantial unnecessary activities in conventional cache architecture. We use a single block buffer as the L1 filter to eliminate the unnecessary cache accesses. In the L2 filter, we then propose a new sentry-tag architecture to further filter out the unnecessary way activities in case of the L1 filter miss. We use SimpleScalar to simulate the SPEC2000 benchmarks and perform the HSPICE simulations to evaluate the proposed architecture. Experimental results show that the two-level filter scheme can effectively reduce the cache power consumption by eliminating most unnecessary cache activities, while the compromise of system performance is negligible. Compared to a conventional instruction cache (32 kB, two-way) implemented with only the L1 filter, the use of a two-level filter can result in roughly 30% reduction in total cache power consumption. Similarly, compared to a conventional data cache (32 kB, four-way) implemented with only the L1 filter, the total cache power reduction is approximately 46%.     

Decreasing miscibility with greater heterogeneity in ternary polymer blend: poly(cyclohexyl methacrylate), poly(α‐methyl styrene) and poly(4‐methyl styrene)

A ternary blend system comprising poly(cyclohexyl methacrylate) (PCHMA), poly(α‐methyl styrene) (PαMS) and poly(4‐methyl styrene) (P4MS) was investigated by thermal analysis, optical and scanning electron microscopy. Ternary phase behaviour was compared with the behaviour for the three constituent binary pairs. This study showed that the ternary blends of PCHMA/PαMS/P4MS in most compositions were miscible, with an apparent glass transition temperature (T_g) and distinct cloud‐point transitions, which were located at lower temperatures than their binary counterparts. However, in a closed‐loop range of compositions roughly near the centre of the triangular phase diagram, some ternary blends displayed phase separation with heterogeneity domains of about 1 µm. Therefore, it is properly concluded that ternary PCHMA/PαMS/P4M is partially miscible with a small closed‐loop immisciblity range, even though all the constituent binary pairs are fully miscible. Thermodynamic backgrounds leading to decreased miscibility and greater heterogeneity in a ternary polymer system in comparison with the binary counterparts are discussed. © 2003 Society of Chemical Industry     

Self-Consistent Effects on the Starting Current of Gyrotron Oscillators

Self-consistent effects on the starting current of gyrotron oscillators are examined. Field profiles in the open cavity are shown to be sensitive to the interaction dynamics. This can either significantly raise or lower the oscillation threshold, particularly for the low-Q modes. The transition from resonant-mode oscillations at the low magnetic field to backward-wave oscillations at the high magnetic field is demonstrated.     

Medium access protocol design for delay-guaranteed multicode CDMA multimedia networks

To enable multimedia real-time applications over next-generation wireless code-division multiple access (CDMA) packet-switching networks, previous efforts show a proper scheduling policy is the key to provide delay-guaranteed access services to various traffic types with different bit error rate (BER) requirements. Considering the support of the prevailing Internet protocol (IP) with variable-length packets in future mobile networks, we develop a mathematically delay-optimal medium access control (MAC) protocol over multicode CDMA (MC-CDMA) environments under the continuous-time assumption. From our investigations, we suggest that a good MAC protocol should be designed by using a proper single-server scheduling policy to guarantee packet-delay, and controlling the maximal number of simultaneous spreading-code transmissions to maintain the required BER. We further evaluate the performance of some MC-CDMA MAC protocols supporting QoS on BER and packet-delay, and show that MAC schemes conforming to our design rules give better performance on packet-delay when maintaining acceptable BER of various traffic types.     

Catalytic dehydrogenation of ethylbenzene with carbon dioxide: promotional effect of antimony in supported vanadium–antimony oxide catalyst

Alumina-supported vanadium oxide, VO_x/Al₂O₃, and binary vanadium–antimony oxides, VSbO_x/Al₂O₃, have been tested in the ethylbenzene dehydrogenation with carbon dioxide and characterized by S_BET, X-ray diffraction, X-ray photoelectron spectroscopy, hydrogen temperature-programmed reduction and CO₂ pulse methods. VSbO_x/Al₂O₃ exhibited enhanced catalytic activity and especially on-stream stability compared to VO_x/Al₂O₃ catalyst. Incorporation of antimony into VO_x/Al₂O₃ increased dispersion of active VO_x species, enhanced redox properties of the systems and formed a new mixed vanadium–antimony oxide phase in the most catalytically efficient V_0.43Sb_0.57O_x/Al₂O₃ system.     

An electrooptic intensity modulator with improved linearity

A highly linear electrooptic modulator has been designed, fabricated, and evaluated. The design of this modulator consists of only a simple modification to the directional coupler. Two-tone testing has demonstrated that, for an optical modulation depth of 30% per channel, the third-order intermodulation distortion is more than 30 dB lower than that of the conventional directional coupler or Mach-Zehnder modulators. This improvement was not observed to be accompanied by any increase in second harmonic distortion. Also included are results of two-tone computer simulations which predict the improvement in linearity of this device for a range of modulation depths.<>     

Two schemes for detecting CMOS analog faults

A design-for-testability scheme for detecting CMOS analog faults was reported by Favalli et al. (see ibid., vol.25, no.5, p.1239-46, 1990). The authors propose two alternative designs, one for small circuits and another for large circuits, which require significantly less area overhead (about 1/4 to 1/3) than that of Favalli's design. With the proposed modification in the first design, the untestable problem, which occurred in Favalli's design, can be alleviated. Furthermore, the proposed schemes are also fit to be implemented in VLSI circuits     

Microstrip reflectarray antenna with offset feed

The authors derive and verify the concept of antenna focusing by a planar 'microstrip reflectarray' antenna. Experimental results from schematically distributed patch radiators with microstrip delay lines are consistent with the simulation results. The advantages and disadvantages of such an antenna are described. The measured overall antenna efficiency is approximately 48% at scan angles up to 30 degrees . These results demonstrate the feasibility of such an antenna.<>     

A hybrid wafer-dicing process for GaAs MMIC production

A dicing process for GaAs MMIC (monolithic microwave integrated circuit) wafers using spin-on wax for wafer mounting and a hybrid process of wet chemical etching/mechanical sawing for chip dicing is described. This process minimizes ragged chip edges and reduces generation of microcracks in addition to the elimination of the plated gold burrs on the backside of the diced MMIC chips. This process gives a uniformity of -3 μm across a 2-in wafer following the completion of the whole backside process. This GaAs chip dicing technique is amenable to production because it exhibits both a very high chip yield (>90%) and nearly flawless edges