Evaluation and optimization of package processing and design through solder joint profile prediction

Solder joints are generated using a variety of methods to provide both mechanical and electrical connection for applications such as flip-chip, wafer level packaging, fine pitch, ball-grid array, and chip scale packages. Solder joint shape prediction has been incorporated as a key tool to aid in process development, wafer level and package level design and development, assembly, and reliability enhancement. This work demonstrates the application of an analytical model and the Surface Evolver software in analyzing a variety of solder processing methods and package types. Bump and joint shape prediction was conducted for the design of wafer level bumping, flip-chip assembly, and wafer level packaging. The results from the prediction methodologies are validated with experimentally measured geometries at each level of design.     

Analytic models for the latency and steady-state throughput of TCP Tahoe, Reno, and SACK

Continuing the process of improvements made to TCP through the addition of new algorithms in Tahoe and Reno, TCP SACK aims to provide robustness to TCP in the presence of multiple losses from the same window. In this paper we present analytic models to estimate the latency and steady-state throughput of TCP Tahoe, Reno, and SACK and validate our models using both simulations and TCP traces collected from the Internet. In addition to being the first models for the latency of finite Tahoe and SACK flows, our model for the latency of TCP Reno gives a more accurate estimation of the transfer times than existing models. The improved accuracy is partly due to a more accurate modeling of the timeouts, evolution of cwnd during slow start and the delayed ACK timer. Our models also show that, under the losses introduced by the droptail queues which dominate most routers in the Internet, current implementations of SACK can fail to provide adequate protection against timeouts and a loss of roughly more than half the packets in a round will lead to timeouts. We also show that with independent losses SACK performs better than Tahoe and Reno and, as losses become correlated, Tahoe can outperform both Reno and SACK.     

Optimal pilot waveform assisted modulation for ultrawideband communications

Ultrawideband (UWB) transmissions induce pronounced frequency-selective fading effects in their multipath propagation. Multipath diversity gains can be collected to enhance performance, provided that the underlying channel can be estimated at the receiver. To this end, we develop a novel pilot waveform assisted modulation (PWAM) scheme that is tailored for UWB communications. We select our PWAM parameters by jointly optimizing channel estimation performance and information rate. The resulting transmitter design maximizes the average capacity, which is shown to be equivalent to minimizing the mean-square channel estimation error, and thereby achieves the Crame/spl acute/r-Rao lower bound. Application of PWAM to practical UWB systems is promising because it entails simple integrate-and-dump operations at the frame rate. Equally important, it offers a flexible UWB channel estimator, capable of striking desirable rate-performance tradeoffs depending on the channel coherence time.     

Effect of the Distribution of Manganese Ions on the Properties of Mn-Doped (Ba,Y)TiO3 PTCR Ceramics

The electrical properties and microstructure of (Ba,Y)TiO₃ PTCR ceramics were studied. The results indicate that the Mn ions increase the intergranular barrier height and produce a high-resistance layer on the grain surface. The temperature-dependent resistances of the grain bulk, surface layer, and grain boundaries, the temperature coefficient of resistance, and the magnitude of the varistor effect were assessed as a function of Mn content.     

Influence of device engineering on the analog and RF performances of SOI MOSFETs

This work presents a systematic comparative study of the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m. We introduce the transconductance-over-drain current ratio and Early voltage as key figures of merits for the analog MOS performance and the gain and the transition and maximum frequencies for RF performances and link them to device engineering. Specifically, we investigate the effects of HALO implantation in FD, PD, and bulk devices, of film thickness in FD, of substrate doping in SOI, and of nonstandard channel engineering (i.e., asymmetric Graded-channel MOSFETs and gate-body contacted DTMOS).     

Static energy reduction techniques for microprocessor caches

Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of static energy consumption due to subthreshold leakage current in cache memory arrays. This paper compares three techniques for reducing static energy consumption in on-chip level-1 and level-2 caches. One technique employs low-leakage transistors in the memory cell. Another technique, power supply switching, can be used to turn off memory cells and discard their contents. A third alternative is dynamic threshold modulation, which places memory cells in a standby state that preserves cell contents. In our experiments, we explore the energy and performance tradeoffs of these techniques. We also investigate the sensitivity of microprocessor performance and energy consumption to additional cache latency caused by leakage-reduction techniques.     

High-performance MIM capacitor using ALD high-k HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectrics

For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.     

The effects of nonlocal impact ionization on the speed of avalanche photodiodes

The nonlocal enhancement in the velocities of charge carriers to ionization is shown to outweigh the opposing effects of dead space, increasing the avalanche speed of short avalanche photodiodes (APDs) over the predictions of a conventional local model which ignores both of these effects. The trends in the measured gain-bandwidth product of two short InAlAs APDs reported in the literature support this result. Relatively large speed benefits are predicted to result from further small reductions in the lengths of short multiplication regions.     

Inside Front Cover: The Elastic Properties and Plastic Behavior of Two‐Dimensional Polymer Structures Fabricated by Laser Interference Lithography (Adv. Funct. Mater. 10/2006)

The probing of the micromechanical properties within a two‐dimensional polymer structure with sixfold symmetry fabricated via interference lithography reveals a nonuniform spatial distribution in the elastic modulus “imprinted” with an interference pattern in work reported by Tsukruk, Thomas, and co‐workers on p. 1324. The image prepared by M. Lemieux and T. Gorishnyy shows how the interference pattern is formed by three laser beams and is transferred to the solid polymer structure. The elastic and plastic properties within a two‐dimensional polymer (SU8) structure with sixfold symmetry fabricated via interference lithography are presented. There is a nonuniform spatial distribution in the elastic modulus, with a higher elastic modulus obtained for nodes (brightest regions in the laser interference pattern) and a lower elastic modulus for beams (darkest regions in the laser interference pattern) of the photopatterned films. We suggest that such a nonuniformity and unusual plastic behavior are related to the variable material properties “imprinted” by the interference pattern.     

Simulating strength and failure in engineering plant

Current features are considered in the calculation of carrying capacities for constructions in engineering plant (EP). Methods and algorithms are described for EP calculations with comprehensive incorporation of the effects from technological and working defects on the behavior of structures under standard and emergency conditions. __________ Translated from Khimicheskoe i Neftegazovoe Mashinostroenie, No. 8, pp. 38–40, August, 2006.